Patent Assignment Details
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Reel/Frame: | 016372/0756 | |
| Pages: | 3 |
| | Recorded: | 03/08/2005 | | |
Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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02/19/2008
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Application #:
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11076497
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Filing Dt:
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03/08/2005
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Publication #:
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Pub Dt:
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09/14/2006
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Title:
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METHOD TO SIMULTANEOUSLY FORM BOTH FULLY SILICIDED AND PARTIALLY SILICIDED DUAL WORK FUNCTION TRANSISTOR GATES DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICES, AND SYSTEMS INCLUDING SAME
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Assignee
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8000 S FEDERAL WAY |
MS 1-525 |
BOISE, IDAHO 83716 |
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Correspondence name and address
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MICRON TECHNOLOGY, INC.
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KEVIN D. MARTIN
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8000 S FEDERAL WAY, MS 1-525
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BOISE, ID 83716
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