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Patent #:
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Issue Dt:
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12/19/1989
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Application #:
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07139885
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Filing Dt:
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12/28/1987
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Title:
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EPROM/FLASH EEPROM CELL AND ARRAY CONFIGURATION
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Patent #:
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Issue Dt:
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09/19/1989
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Application #:
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07185719
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Filing Dt:
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04/25/1988
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Title:
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GATE CONTROLLABLE LIGHTLY DOPED DRAIN MOSFET DEVICES
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Patent #:
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Issue Dt:
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12/19/1989
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Application #:
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07187171
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Filing Dt:
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04/28/1988
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Title:
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ROM CELL AND ARRAY CONFIGURATION
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Patent #:
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Issue Dt:
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09/15/1992
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Application #:
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07676780
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Filing Dt:
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03/27/1991
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Title:
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OUTPUT BUFFER CIRCUIT
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Patent #:
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Issue Dt:
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03/09/1993
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Application #:
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07763087
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Filing Dt:
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09/20/1991
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Title:
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CHARGE-PUMP PHASE LOCKED LOOP CIRCUIT
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Patent #:
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Issue Dt:
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09/13/1994
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Application #:
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07961439
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Filing Dt:
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10/15/1992
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Title:
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EFFICIENT NEGATIVE CHARGE PUMP
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Patent #:
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Issue Dt:
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05/02/1995
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Application #:
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07964003
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Filing Dt:
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10/20/1992
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Title:
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HIGH EFFICIENCY N-CHANNEL CHARGE PUMP HAVING A PRIMARY PUMP AND A NON-CASSCADED SECONDARY PUMP
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Patent #:
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Issue Dt:
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09/06/1994
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Application #:
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07964761
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Filing Dt:
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10/22/1992
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Title:
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LOW POWER VCC AND TEMPERATURE INDEPENDENT OSCILLATOR
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Patent #:
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Issue Dt:
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09/13/1994
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Application #:
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07964912
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Filing Dt:
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10/22/1992
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Title:
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OSCILLATORLESS SUBSTRATE BIAS GENERATOR
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Patent #:
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Issue Dt:
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07/05/1994
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Application #:
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08018802
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Filing Dt:
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02/17/1993
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Title:
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SELF-TIMED BOOTSTRAP DECODER
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Patent #:
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Issue Dt:
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12/13/1994
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Application #:
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08037818
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Filing Dt:
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03/26/1993
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Title:
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METHOD AND CIRCUIT FOR CONFIGURING I/O DEVICES
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Patent #:
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Issue Dt:
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07/04/1995
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Application #:
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08134928
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Filing Dt:
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10/12/1993
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Title:
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DRAM HAVING SELF-TIMED BURST REFRESH MODE
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Patent #:
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Issue Dt:
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08/08/1995
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Application #:
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08216208
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Filing Dt:
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03/22/1994
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Title:
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PROGRAMMABLE CIRCUIT WITH FUSIBLE LATCH
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Patent #:
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Issue Dt:
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05/07/1996
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Application #:
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08242382
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Filing Dt:
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05/13/1994
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Title:
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THROUGH GLASS ROM CODE IMPLANT TO REDUCE PRODUCT DELIVERING TIME
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Patent #:
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Issue Dt:
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08/01/1995
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Application #:
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08252269
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Filing Dt:
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06/01/1994
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Title:
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HIGH SPEED DIFFERENTIAL CURRENT SENSE AMPLIFIER WITH POSITIVE FEEDBACK
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Patent #:
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Issue Dt:
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02/29/2000
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Application #:
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08271477
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Filing Dt:
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07/07/1994
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Title:
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LOW POWER CIRCUIT FOR DETECTING A SLOW CHANGING INPUT
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Patent #:
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Issue Dt:
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10/24/1995
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Application #:
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08271719
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Filing Dt:
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07/07/1994
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Title:
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LOW POWER VCC AND TEMPERATURE INDEPENDENT OSCILLATOR
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Patent #:
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Issue Dt:
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07/11/2000
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Application #:
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08284183
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Filing Dt:
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08/02/1994
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Title:
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SENSE AMPLIFIER WITH LOCAL WRITE DRIVERS
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Patent #:
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Issue Dt:
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05/14/1996
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Application #:
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08357486
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Filing Dt:
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12/16/1994
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Title:
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METHOD FOR FORMING LDD CMOS WITH OBLIQUE IMPLANTATION
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08419909
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Filing Dt:
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04/11/1995
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Title:
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MEMORY DEVICE CIRCUIT AND METHOD FOR CONCURRENTLY ADDRESSING COLUMNS OF MULTIPLE BANKS OF MULTI-BANK MEMORY ARRAY
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Patent #:
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Issue Dt:
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02/25/1997
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Application #:
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08422754
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Filing Dt:
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04/14/1995
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Title:
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SEMICONDUCTOR DEVICE WITH LIGHTLY DOPED DRAIN REGIONS
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Patent #:
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Issue Dt:
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11/25/1997
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Application #:
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08423671
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Filing Dt:
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04/13/1995
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Title:
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THROUGH GLASS ROM CODE IMPLANT TO REDUCE PRODUCT DELIVERING TIME
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Patent #:
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Issue Dt:
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03/27/2001
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Application #:
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08432884
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Filing Dt:
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05/02/1995
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Title:
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SENSE AMPLIFIER WITH LOCAL COLIMN READ AMPLIFIER AND LOCAL DATA WRITE DRIVERS
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Patent #:
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Issue Dt:
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12/16/1997
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Application #:
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08437811
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Filing Dt:
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05/09/1995
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Title:
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BOND PAD OPTION FOR INTEGRATED CIRCUITS
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Patent #:
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Issue Dt:
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01/02/1996
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Application #:
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08445058
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Filing Dt:
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05/19/1995
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Title:
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PROGRAMMABLE BINARY/INTERLEAVE SEQUENCE COUNTER
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08483279
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Filing Dt:
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06/07/1995
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Title:
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AMPLIFIER AND METHOD FOR SENSING HAVING A PRE-BIAS OR COUPLING STEP
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Patent #:
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Issue Dt:
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05/05/1998
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Application #:
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08534778
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Filing Dt:
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09/27/1995
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Title:
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MODIFIED POLY-BUFFERED ISOLATION
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Patent #:
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Issue Dt:
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02/09/1999
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Application #:
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08534901
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Filing Dt:
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09/28/1995
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Title:
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METHOD FOR FORMING INSULATING LAYERS BETWEEN POLYSILICON LAYERS
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Patent #:
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Issue Dt:
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09/08/1998
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Application #:
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08540773
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Filing Dt:
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10/11/1995
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Title:
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METHOD FOR PREVENTING SUBSTRATE DAMAGE DURING SEMICONDUCTOR FABRICATION
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Patent #:
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Issue Dt:
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08/20/1996
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Application #:
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08540774
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Filing Dt:
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10/11/1995
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Title:
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METHOD FOR FORMING RETROGRADE CHANNEL PROFILE BY PHOPSPHORUS IMPLANTATION THROUGH POLYSILICON GATE
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Patent #:
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Issue Dt:
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07/01/1997
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Application #:
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08543226
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Filing Dt:
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10/13/1995
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Title:
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TUNGSTEN CHEMICAL VAPOR DEPOSITION PROCESS FOR SUPPRESSION OF VOLCANO FORMATION
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Patent #:
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Issue Dt:
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09/30/1997
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Application #:
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08563526
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Filing Dt:
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11/28/1995
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Title:
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ANTIREFLECTION COATING FOR HIGHLY REFLECTIVE PHOTOLITHOGRAPHIC LAYERS COMPRISING CHROMIUM OXIDE OR CHROMIUM SUBOXIDE
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Patent #:
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Issue Dt:
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07/08/1997
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Application #:
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08573960
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Filing Dt:
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12/15/1995
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Title:
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METHOD OF FORMING GATE OXIDE FOR FIELD EFFECT TRANSISTOR
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Patent #:
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Issue Dt:
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11/16/1999
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Application #:
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08585994
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Filing Dt:
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01/12/1996
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Title:
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DATA LINE BIAS CIRCUIT
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Patent #:
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Issue Dt:
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08/11/1998
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Application #:
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08598258
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Filing Dt:
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02/07/1996
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Title:
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METHOD OF FORMING A BIT-LINE AND A CAPACITOR STRUCTURE IN AN INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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07/01/1997
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Application #:
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08601179
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Filing Dt:
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02/14/1996
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Title:
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"BIMODAL" REFRESH CIRCUIT AND METHOD FOR USING SAME TO REDUCE STANBY CURRENT AND ENHANCE YIELDS OF DYNAMIC MEMORY PRODUCTS
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08603056
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Filing Dt:
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02/16/1996
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Title:
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APPARATUS FOR GUIDING AIR CURRENT OF EQUIPMENT USED IN CLEAN ROOM
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Patent #:
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Issue Dt:
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09/22/1998
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Application #:
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08617489
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Filing Dt:
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03/15/1996
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Title:
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PLANARIZED INTEGRATED CIRCUIT PRODUCT AND METHOD FOR MAKING IT
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Patent #:
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Issue Dt:
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10/27/1998
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Application #:
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08623435
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Filing Dt:
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03/28/1996
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Title:
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METHOD FOR FORMING LDD CMOS USING DOUBLE SPACERS AND LARGE-TILT-ANGLE ION IMPLANTATION
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Patent #:
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Issue Dt:
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11/11/1997
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Application #:
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08625587
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Filing Dt:
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03/28/1996
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Title:
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PROCESS FOR FORMING LDD CMOS USING LARGE-TILT-ANGLE ION IMPLANTATION
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Patent #:
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Issue Dt:
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10/27/1998
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Application #:
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08626111
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Filing Dt:
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04/01/1996
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Title:
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ADDITIVE METALIZATION USING PHOTOSENSITIVE POLYMER AS RIE MASK AND PART OF COMPOSITE INSULATOR
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Patent #:
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Issue Dt:
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03/02/1999
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Application #:
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08646019
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Filing Dt:
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05/07/1996
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Title:
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MODIFIED POLY-BUFFERED LOCOS FORMING TECHNOLOGY AVOIDING THE POSITIVE CHARGE TRAPPING AT THE BEAK OF FIELD OXIDE
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Patent #:
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Issue Dt:
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08/31/1999
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Application #:
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08649466
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Filing Dt:
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05/17/1996
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Title:
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SELF ALIGNED METHOD OF FABRICATING A DRAM WITH IMPROVED CAPACITANCE
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Patent #:
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Issue Dt:
|
01/12/1999
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Application #:
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08650530
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Filing Dt:
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05/20/1996
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Title:
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METHOD OF MAKING AN INVERSE-T TUNGSTEN GATE
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Patent #:
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Issue Dt:
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10/28/1997
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Application #:
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08655545
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Filing Dt:
|
05/30/1996
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Title:
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THROUGH GLASS ROM CODE IMPLANT TO REDUCE PRODUCT DELIVERING TIME
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Patent #:
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Issue Dt:
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12/23/1997
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Application #:
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08660486
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Filing Dt:
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06/07/1996
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Title:
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WAFER METROLOGY PATTERN INTEGRATING BOTH OVERLAY AND CRITICAL DIMENSION FEATURES FOR SEM OR AFM MEASUREMENTS
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Patent #:
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Issue Dt:
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03/09/1999
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Application #:
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08661912
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Filing Dt:
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06/12/1996
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Title:
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CAPACITOR OF A DRAM CELL AND METHOD OF MAKING SAME
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Patent #:
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Issue Dt:
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08/17/1999
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Application #:
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08665569
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Filing Dt:
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06/18/1996
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Title:
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MANIFOLD HAVING OUTLETS EQUALLY SPACED FROM THE INLET
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Patent #:
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Issue Dt:
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06/19/2001
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Application #:
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08674282
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Filing Dt:
|
07/01/1996
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Title:
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SENSE AMPLIFIER WITH LOCAL SENSE DRIVERS AND LOCAL READ AMPLIFIERS
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Patent #:
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Issue Dt:
|
09/08/1998
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Application #:
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08683248
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Filing Dt:
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07/18/1996
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Title:
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METHOD OF PREVENTING DEFECTS AND PARTICLES PRODUCED AFTER TUNGSTEN ETCH BACK
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Patent #:
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Issue Dt:
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08/14/2001
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Application #:
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08684328
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Filing Dt:
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07/17/1996
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Title:
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METHOD OF READING AND WRITING DATA USING LOCAL DATA READ AND LOCAL DATA WRITE CIRCUITS
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Patent #:
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Issue Dt:
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12/30/1997
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Application #:
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08684517
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Filing Dt:
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07/19/1996
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Title:
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DOUBLE-POLY MONOS FLASH EEPROM CELL
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Patent #:
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Issue Dt:
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10/21/1997
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Application #:
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08685757
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Filing Dt:
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07/24/1996
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Title:
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SELF-REGISTERED CAPACITOR BOTTOM PLATE-LOCAL INTERCONNECT SCHEME FOR DRAM
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Patent #:
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Issue Dt:
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03/17/1998
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Application #:
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08685815
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Filing Dt:
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07/24/1996
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Title:
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METHOD OF MANUFACTURING A SRAM CELL HAVING A LOW STAND-BY CURRENT
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Patent #:
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Issue Dt:
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12/22/1998
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Application #:
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08697442
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Filing Dt:
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08/23/1996
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Title:
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METHOD OF FORMING STACKED CAPACITOR HAVING CORRUGATED SIDE-WALL STRUCTURE
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Patent #:
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Issue Dt:
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10/27/1998
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Application #:
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08697443
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Filing Dt:
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08/23/1996
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Title:
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STACKED CAPACITOR HAVING IMPROVED CHARGE STORAGE CAPACITY
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Patent #:
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Issue Dt:
|
09/28/1999
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Application #:
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08697622
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Filing Dt:
|
08/27/1996
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Title:
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METHOD OF FABRICATING A CAPACITOR ON A RUGGED STACKED OXIDE LAYER
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Patent #:
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Issue Dt:
|
12/22/1998
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Application #:
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08697623
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Filing Dt:
|
08/27/1996
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Title:
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RUGGED STACKED OXIDE LAYER STRUCTURE AND METHOD OF FABRICATING SAME
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Patent #:
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Issue Dt:
|
04/23/2002
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Application #:
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08701943
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Filing Dt:
|
08/23/1996
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|
Title:
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APPARATUS AND METHOD FOR SEMICONDUCTOR WAFER PROCESSING SYSTEM
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Patent #:
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|
Issue Dt:
|
08/04/1998
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Application #:
|
08702747
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Filing Dt:
|
08/23/1996
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|
Title:
|
METHOD OF MAKING CORRUGATED CELL CONTACT
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Patent #:
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Issue Dt:
|
05/30/2000
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Application #:
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08706652
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Filing Dt:
|
10/07/1996
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|
Title:
|
PROCESS AND STRUCTURE FOR INCREASING CAPACITANCE OF STACK CAPACITOR
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Patent #:
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Issue Dt:
|
07/07/1998
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Application #:
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08707758
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Filing Dt:
|
09/04/1996
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|
Title:
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METHOD FOR FORMING METAL PLUG
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Patent #:
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Issue Dt:
|
03/10/1998
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Application #:
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08712523
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Filing Dt:
|
09/11/1996
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Title:
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AUTOMATIC TEMPERATURE CONTROLLING SYSTEM
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Patent #:
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|
Issue Dt:
|
08/24/1999
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Application #:
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08714217
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Filing Dt:
|
09/16/1996
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Title:
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NON-STICKING SEMI-CONDUCTOR WAFER CLAMP AND MEHTOD OF MAKING SAME
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Patent #:
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Issue Dt:
|
03/02/1999
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Application #:
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08718117
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Filing Dt:
|
09/18/1996
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Title:
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OUTPUT BUFFER WITH LOW NOISE AND HIGH DRIVE CAPABILITY
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Patent #:
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Issue Dt:
|
05/05/1998
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Application #:
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08720762
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Filing Dt:
|
10/03/1996
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Title:
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PROCESS FOR MANUFACTURING CMOS DEVICE
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Patent #:
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Issue Dt:
|
07/22/1997
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Application #:
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08720881
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Filing Dt:
|
10/03/1996
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Title:
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PROCESS FOR FABRICATING CMOS DEVICE
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Patent #:
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Issue Dt:
|
10/20/1998
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Application #:
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08725122
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Filing Dt:
|
10/02/1996
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Title:
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METHOD FOR FORMING LOW CONTACT RESISTANCE BONDING PAD
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Patent #:
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Issue Dt:
|
10/26/1999
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Application #:
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08727076
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Filing Dt:
|
10/08/1996
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Title:
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METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICES USING DOUBLE-CHARGED IMPLANTATION
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Patent #:
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Issue Dt:
|
03/16/1999
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Application #:
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08728305
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Filing Dt:
|
10/09/1996
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Title:
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METHOD FOR INCREASING THE REFRESH TIME OF THE DRAM
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Patent #:
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Issue Dt:
|
04/06/1999
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Application #:
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08735981
|
Filing Dt:
|
10/25/1996
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|
Title:
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ARC CHAMBER FOR ION IMPLANTER
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Patent #:
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Issue Dt:
|
08/04/1998
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Application #:
|
08736390
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Filing Dt:
|
10/24/1996
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Title:
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METHOD OF MAKING EEPROM CELL DEVICE WITH POLYSPACER FLOATING GATE
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Patent #:
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Issue Dt:
|
02/09/1999
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Application #:
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08741195
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Filing Dt:
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10/29/1996
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Title:
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TEOS-OZONE PLANARIZATION PROCESS
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Patent #:
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Issue Dt:
|
10/12/1999
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Application #:
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08743744
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Filing Dt:
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11/07/1996
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Title:
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METHOD FOR STABILIZING A SILICON STRUCTURE AFTER ION IMPLANTATION
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Patent #:
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Issue Dt:
|
12/09/1997
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Application #:
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08746765
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Filing Dt:
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11/15/1996
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Title:
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PROCESS FOR MANUFACTURING A CMOSFET INTERGRATED CIRCUIT
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Patent #:
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Issue Dt:
|
03/10/1998
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Application #:
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08746842
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Filing Dt:
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11/18/1996
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Title:
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METHOD OF MAKING SELF-ALIGNED CYLINDRICAL CAPACITOR STRUCTURE OF STACK DRAMS
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Patent #:
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Issue Dt:
|
12/09/1997
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Application #:
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08751089
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Filing Dt:
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11/15/1996
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Title:
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DRAM NO CAPACITOR DIELECTRIC PROCESS
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Patent #:
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Issue Dt:
|
07/20/1999
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Application #:
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08753216
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Filing Dt:
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11/21/1996
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Title:
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PROCESS FOR FABRICATING MOS DEVICE HAVING SHORT CHANNEL
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Patent #:
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Issue Dt:
|
11/25/1997
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Application #:
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08754602
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Filing Dt:
|
11/20/1996
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Title:
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METHOD FOR FORMING BLANKET PLANARIZATION OF THE MULTILEVEL INTERCONNECTION
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Patent #:
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Issue Dt:
|
02/29/2000
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Application #:
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08760665
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Filing Dt:
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12/09/1996
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Title:
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CHEMICAL VAPOR DEPOSITION OF TUNGSTEN (W-CVD) PROCESS FOR GROWING LOW STRESS AND VOID FREE INTERCONNECT
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Patent #:
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Issue Dt:
|
06/23/1998
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Application #:
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08764335
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Filing Dt:
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12/12/1996
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Title:
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METHOD OF IN-SITU WAFER COOLING FOR A SEQUENCIAL WSI/ALPHA-SI SPUTTERING PROCESS
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Patent #:
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Issue Dt:
|
10/20/1998
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Application #:
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08764336
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Filing Dt:
|
12/12/1996
|
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Title:
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METHOD FOR MAKING A CMOS TRANSISTOR USING LIQUID PHASE DEPOSITION
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|
|
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Patent #:
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Issue Dt:
|
08/04/1998
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Application #:
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08764612
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Filing Dt:
|
12/05/1996
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Title:
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METHOD FOR MANUFACTURING SPLIT GATE FLASH MEMORY
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|
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Patent #:
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Issue Dt:
|
10/19/1999
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Application #:
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08764872
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Filing Dt:
|
12/03/1996
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Title:
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DRAM CELL WITH A ROUGHENED POLY-SI ELECTRODE
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|
|
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Patent #:
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Issue Dt:
|
11/25/1997
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Application #:
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08772210
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Filing Dt:
|
12/20/1996
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Title:
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METHOD OF FABRICATING A CAPACITOR OVER A BIT LINE DRAM PROCESS
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|
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Patent #:
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Issue Dt:
|
09/22/1998
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Application #:
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08774728
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Filing Dt:
|
01/03/1997
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Title:
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LOW TEMPERATURE DRY PROCESS FOR STRIPPING PHOTORESIST AFTER HIGH DOSE ION IMPLANTATION
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Patent #:
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Issue Dt:
|
07/04/2000
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Application #:
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08774753
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Filing Dt:
|
12/30/1996
|
|
Title:
|
MANUFACTURING PROCESS OF A SPLIT GATE FLASH MEMORY UNIT
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|
|
|
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Patent #:
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|
Issue Dt:
|
06/01/1999
|
Application #:
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08775375
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Filing Dt:
|
01/03/1997
|
|
Title:
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METHOD FOR REDUCING THE REFLECTIVITY OF A SILICIDE LAYER
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|
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Patent #:
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|
Issue Dt:
|
07/21/1998
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Application #:
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08777276
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Filing Dt:
|
01/06/1997
|
|
Title:
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STRUCTURE AND MANUFACTURING PROCESS OF A SPLIT GATE FLASH MEMORY UNIT
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Patent #:
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|
Issue Dt:
|
10/12/1999
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Application #:
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08785547
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Filing Dt:
|
01/21/1997
|
|
Title:
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METHOD OF FORMING BORDERLESS METAL TO CONTACT STRUCTURE
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|
|
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Patent #:
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Issue Dt:
|
09/22/1998
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Application #:
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08789495
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Filing Dt:
|
01/27/1997
|
|
Title:
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METHOD OF FORMING A CAPACITOR OF A DRAM CELL
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Patent #:
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Issue Dt:
|
03/31/1998
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Application #:
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08789811
|
Filing Dt:
|
01/28/1997
|
|
Title:
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A DETACHABLE TORCH FOR WET OXIDATION
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|
|
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Patent #:
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|
Issue Dt:
|
07/06/1999
|
Application #:
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08791870
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Filing Dt:
|
01/31/1997
|
|
Title:
|
METHOD OF FORMING A SELF-ALIGNED CONTACT (SAC) WINDOW
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|
|
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Patent #:
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|
Issue Dt:
|
06/01/1999
|
Application #:
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08795789
|
Filing Dt:
|
02/05/1997
|
|
Title:
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SINGLE-SIDE CORRUGATED CYLINDRICAL CAPACITOR STRUCTURE OF HIGH DENSITY DRAMS
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|
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Patent #:
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Issue Dt:
|
12/01/1998
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Application #:
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08796023
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Filing Dt:
|
02/05/1997
|
|
Title:
|
DOUBLE-SIDE CORRUGATED CYLINDRICAL CAPACITOR STRUCTURE OF HIGH DENSITY DRAMS
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|
|
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Patent #:
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|
Issue Dt:
|
11/02/1999
|
Application #:
|
08798231
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Filing Dt:
|
02/11/1997
|
|
Title:
|
MODIFIED POLY-BUFFERED ISOLATION
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|
|
|
|
Patent #:
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|
Issue Dt:
|
06/02/1998
|
Application #:
|
08798560
|
Filing Dt:
|
02/11/1997
|
|
Title:
|
ALIGNMENT MARK PATTERN FOR SEMICONDUCTOR PROCESS
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|
Patent #:
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|
Issue Dt:
|
05/09/2000
|
Application #:
|
08803623
|
Filing Dt:
|
02/21/1997
|
|
Title:
|
APPARATUS AND METH0D FOR POLISHING A FLAT SURFACE USING A BELTED POLISHING PAD
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|
|
|
|
Patent #:
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|
Issue Dt:
|
01/25/2000
|
Application #:
|
08805295
|
Filing Dt:
|
02/25/1997
|
|
Title:
|
METHOD OF FABRICATING AIN ANTI-REFLECTION COATING ON METAL LAYER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2000
|
Application #:
|
08820246
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Filing Dt:
|
03/18/1997
|
|
Title:
|
METHOD FOR FORMING LDD CMOS
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|
