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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:015908/0778   Pages: 2
Recorded: 08/23/2004
Attorney Dkt #:1365.0000001
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 8
1
Patent #:
Issue Dt:
04/02/2002
Application #:
09406941
Filing Dt:
09/28/1999
Title:
METHOD OF GENERATING FINITE STATE DATA FOR DESIGNING A CASCADE DECOMPOSED LOGIC CIRCUIT
2
Patent #:
Issue Dt:
08/30/2005
Application #:
09637532
Filing Dt:
08/11/2000
Title:
PARALLEL COUNTER AND A MULTIPLICATION LOGIC CIRCUIT
3
Patent #:
Issue Dt:
04/19/2005
Application #:
09769954
Filing Dt:
01/25/2001
Publication #:
Pub Dt:
02/28/2002
Title:
PARALLEL COUNTER AND A MULTIPLICATION LOGIC CIRCUIT
4
Patent #:
Issue Dt:
09/30/2003
Application #:
09771922
Filing Dt:
01/29/2001
Publication #:
Pub Dt:
11/22/2001
Title:
METHOD AND APPARATUS FOR BINARY ENCODING LOGIC CIRCUITS
5
Patent #:
Issue Dt:
11/21/2006
Application #:
09898752
Filing Dt:
07/03/2001
Publication #:
Pub Dt:
09/26/2002
Title:
MULTIPLICATION LOGIC CIRCUIT
6
Patent #:
Issue Dt:
11/14/2006
Application #:
09917257
Filing Dt:
07/27/2001
Publication #:
Pub Dt:
06/20/2002
Title:
PARALLEL COUNTER AND A LOGIC CIRCUIT FOR PERFORMING MULTIPLICATION
7
Patent #:
NONE
Issue Dt:
Application #:
10027237
Filing Dt:
12/20/2001
Publication #:
Pub Dt:
07/24/2003
Title:
LOGIC CIRCUITS FOR PERFORMING MODULAR MULTIPLICATION AND EXPONENTIATION
8
Patent #:
Issue Dt:
09/25/2007
Application #:
10472658
Filing Dt:
09/22/2003
Publication #:
Pub Dt:
05/27/2004
Title:
MULTIPLICATION LOGIC CIRCUIT
Assignor
1
Exec Dt:
10/15/2003
Assignee
1
26A BINSWOOD AVENUE
LEAMINGTON SPA, WARWICKSHIRE, ENGLAND CV32 5SQ
Correspondence name and address
TIMOTHY B. CLISE
SCHWEGMAN, LUNDBERG, WOESSNER & KLUTH PA
P.O. BOX 2938
MINNEAPOLIS, MN 55402

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