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Reel/Frame:036907/0785   Pages: 10
Recorded: 10/20/2015
Attorney Dkt #:107109-00-0071
Conveyance: CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUS PATENT NUMBER 9029901 TO THE CORRECT PATENT NO. 9029201 AS PREVIOUSLY RECORDED ON REEL 036812 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE TERMINATION AND RELEASE OF GRANT OF SECURITY INTEREST AGAINST ALL PATENTS SET FORTH HEREIN.
Total properties: 23
1
Patent #:
Issue Dt:
07/31/2012
Application #:
12836506
Filing Dt:
07/14/2010
Publication #:
Pub Dt:
01/20/2011
Title:
SEMICONDUCTOR-ON-INSULATOR WITH BACK SIDE CONNECTION
2
Patent #:
Issue Dt:
05/19/2015
Application #:
12836510
Filing Dt:
07/14/2010
Publication #:
Pub Dt:
01/20/2011
Title:
SEMICONDUCTOR-ON-INSULATOR WITH BACK SIDE SUPPORT LAYER
3
Patent #:
Issue Dt:
05/12/2015
Application #:
12836559
Filing Dt:
07/14/2010
Publication #:
Pub Dt:
01/20/2011
Title:
SEMICONDUCTOR-ON-INSULATOR WITH BACK SIDE HEAT DISSIPATION
4
Patent #:
Issue Dt:
04/23/2013
Application #:
13270335
Filing Dt:
10/11/2011
Publication #:
Pub Dt:
04/12/2012
Title:
Vertical Semiconductor Device with Thinned Substrate
5
Patent #:
Issue Dt:
04/23/2013
Application #:
13270339
Filing Dt:
10/11/2011
Publication #:
Pub Dt:
04/12/2012
Title:
VERTICAL SEMICONDUCTOR DEVICE WITH THINNED SUBSTRATE
6
Patent #:
Issue Dt:
06/18/2013
Application #:
13311454
Filing Dt:
12/05/2011
Publication #:
Pub Dt:
06/14/2012
Title:
THERMAL CONDUCTION PATHS FOR SEMICONDUCTOR STRUCTURES
7
Patent #:
Issue Dt:
06/18/2013
Application #:
13313231
Filing Dt:
12/07/2011
Publication #:
Pub Dt:
06/28/2012
Title:
TRAP RICH LAYER FOR SEMICONDUCTOR DEVICES
8
Patent #:
Issue Dt:
08/29/2017
Application #:
13452836
Filing Dt:
04/21/2012
Publication #:
Pub Dt:
08/16/2012
Title:
SEMICONDUCTOR-ON-INSULATOR WITH BACK SIDE STRAIN INDUCING MATERIAL
9
Patent #:
Issue Dt:
01/22/2013
Application #:
13459110
Filing Dt:
04/28/2012
Publication #:
Pub Dt:
08/23/2012
Title:
SEMICONDUCTOR-ON-INSULATOR WITH BACK SIDE CONNECTION
10
Patent #:
Issue Dt:
05/26/2015
Application #:
13544815
Filing Dt:
07/09/2012
Publication #:
Pub Dt:
01/09/2014
Title:
CHARGE PUMP REGULATOR CIRCUIT WITH A VARIABLE DRIVE VOLTAGE RING OSCILLATOR
11
Patent #:
Issue Dt:
07/09/2013
Application #:
13652240
Filing Dt:
10/15/2012
Publication #:
Pub Dt:
02/14/2013
Title:
Trap Rich Layer with Through-Silicon-Vias in Semiconductor Devices
12
Patent #:
Issue Dt:
09/17/2013
Application #:
13684623
Filing Dt:
11/26/2012
Publication #:
Pub Dt:
04/04/2013
Title:
TRAP RICH LAYER FORMATION TECHNIQUES FOR SEMICONDUCTOR DEVICES
13
Patent #:
Issue Dt:
07/30/2013
Application #:
13720589
Filing Dt:
12/19/2012
Title:
CHARGE PUMP REGULATOR CIRCUIT
14
Patent #:
Issue Dt:
12/30/2014
Application #:
13725245
Filing Dt:
12/21/2012
Publication #:
Pub Dt:
02/06/2014
Title:
THIN INTEGRATED CIRCUIT CHIP-ON-BOARD ASSEMBLY AND METHOD OF MAKING
15
Patent #:
Issue Dt:
12/16/2014
Application #:
13725306
Filing Dt:
12/21/2012
Publication #:
Pub Dt:
05/30/2013
Title:
INTEGRATED CIRCUIT ASSEMBLY AND METHOD OF MAKING
16
Patent #:
Issue Dt:
07/12/2016
Application #:
13725403
Filing Dt:
12/21/2012
Publication #:
Pub Dt:
06/26/2014
Title:
BACK-TO-BACK STACKED INTEGRATED CIRCUIT ASSEMBLY AND METHOD OF MAKING
17
Patent #:
Issue Dt:
10/14/2014
Application #:
13746288
Filing Dt:
01/21/2013
Publication #:
Pub Dt:
05/23/2013
Title:
Semiconductor-on-Insulator with Back Side Body Connection
18
Patent #:
Issue Dt:
03/18/2014
Application #:
13939422
Filing Dt:
07/11/2013
Publication #:
Pub Dt:
02/06/2014
Title:
POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE
19
Patent #:
Issue Dt:
08/09/2016
Application #:
13939451
Filing Dt:
07/11/2013
Publication #:
Pub Dt:
02/06/2014
Title:
POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE
20
Patent #:
Issue Dt:
01/06/2015
Application #:
13939490
Filing Dt:
07/11/2013
Publication #:
Pub Dt:
02/06/2014
Title:
POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE
21
Patent #:
Issue Dt:
03/31/2015
Application #:
14305632
Filing Dt:
06/16/2014
Publication #:
Pub Dt:
10/02/2014
Title:
POWER DEVICE INTEGRATION ON A COMMON SUBSTRATE
22
Patent #:
Issue Dt:
01/31/2017
Application #:
14574707
Filing Dt:
12/18/2014
Publication #:
Pub Dt:
06/23/2016
Title:
LDMOS with Adaptively Biased Gate-Shield
23
Patent #:
Issue Dt:
10/03/2017
Application #:
14730092
Filing Dt:
06/03/2015
Publication #:
Pub Dt:
12/08/2016
Title:
TRANSISTOR WITH CONTACTED DEEP WELL REGION
Assignor
1
Exec Dt:
10/02/2015
Assignee
1
4795 EASTGATE MALL SUITE 100
SAN DIEGO, CALIFORNIA 92121
Correspondence name and address
JENNIFER KAGAN, PARALEGAL
ONE FEDERAL STREET
MORGAN, LEWIS & BOCKIUS LLP
BOSTON, MA 02110

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