skip navigationU S P T O SealUnited States Patent and Trademark Office AOTW logo
Home|Site Index|Search|Guides|Contacts|eBusiness|eBiz alerts|News|Help
Assignments on the Web > Patent Query
Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:014337/0787   Pages: 5
Recorded: 08/01/2003
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 23
1
Patent #:
Issue Dt:
04/24/1984
Application #:
06456183
Filing Dt:
01/06/1983
Title:
REACTIVE ION ETCHING OF MOLTYBDENUM SILICIDE AND N POLYSILICON
2
Patent #:
Issue Dt:
10/22/1985
Application #:
06492102
Filing Dt:
05/06/1983
Title:
MOS VOLTAGE COMPARATOR AND METHOD
3
Patent #:
Issue Dt:
02/05/1985
Application #:
06544914
Filing Dt:
10/24/1983
Title:
SMALL AREA HIGH VALUE RESISTOR WITH GREATLY REDUCED PARASITIC CAPACITANCE
4
Patent #:
Issue Dt:
06/10/1986
Application #:
06621773
Filing Dt:
06/18/1984
Title:
TWO-LEVEL TRANSISTOR STRUCTURES AND METHOD UTILIZING MINIMAL AREA THEREFOR
5
Patent #:
Issue Dt:
06/07/1988
Application #:
06837560
Filing Dt:
03/03/1986
Title:
DIFFUSED FIELD CMOS-BULK PROCESS
6
Patent #:
Issue Dt:
10/06/1987
Application #:
06856302
Filing Dt:
04/28/1986
Title:
METHOD OF MAKING HARDENED NMOS SUB-MICRON FIELD EFFECT TRANSISTORS
7
Patent #:
Issue Dt:
09/22/1987
Application #:
06856304
Filing Dt:
04/28/1986
Title:
METHOD OF MAKING HARDENED CMOS SUB-MICRON FIELD EFFECT TRANSISTORS
8
Patent #:
Issue Dt:
07/09/1991
Application #:
07062007
Filing Dt:
06/12/1987
Title:
LATERAL TRANSISTOR SEPARATED FROM SUBSTRATE BY INTERSECTING SLOTS FILLED WITH SUBSTRATE OXIDE FOR MINIMAL INTERFERENCE THEREFROM
9
Patent #:
Issue Dt:
08/27/1991
Application #:
07066593
Filing Dt:
06/24/1987
Title:
EXTREMELY SMALL AREA NPN LATERAL TRANSISTOR
10
Patent #:
Issue Dt:
09/10/1991
Application #:
07066663
Filing Dt:
06/24/1987
Title:
PNP TYPE LATERAL TRANSISTOR WITH MINIMAL SUBSTRATE OPERATION INTERFERENCE
11
Patent #:
Issue Dt:
03/17/1992
Application #:
07068383
Filing Dt:
06/11/1987
Title:
COMPLEMENTARY NPN AND PNP LATERAL TRANSISTORS SEPARATED FROM SUBSTRATE BY INTERSECTING SLOTS FILLED WITH SUBSTRATE OXIDE FOR MINIMAL INTERFERENCE THEREFROM
12
Patent #:
Issue Dt:
08/07/1990
Application #:
07073591
Filing Dt:
07/15/1987
Title:
SUB-MICRON DEVICES WITH METHOD FOR FORMING SUB-MICRON CONTACTS
13
Patent #:
Issue Dt:
11/07/1989
Application #:
07105413
Filing Dt:
10/07/1987
Title:
DIFFUSED FIELD CMOS-BULK PROCESS AND CMOS TRANSISTORS
14
Patent #:
Issue Dt:
12/29/1992
Application #:
07474608
Filing Dt:
02/05/1990
Title:
SINGLE EVENT UPSET HARDENING CIRCUITS, DEVICES AND METHODS
15
Patent #:
Issue Dt:
09/24/1991
Application #:
07529020
Filing Dt:
05/25/1990
Title:
SUB-MICRON BIPOLAR DEVICES WITH SUB-MICRON CONTACTS CONTACTS
16
Patent #:
Issue Dt:
05/19/1992
Application #:
07529982
Filing Dt:
05/30/1990
Title:
A METHOD OF MAKING A SUB-MICRON, PMOS AND CMOS DEVICES WITH METHODS FOR FORMING SUB-MICRON CONTACTS
17
Patent #:
Issue Dt:
05/19/1992
Application #:
07583251
Filing Dt:
09/17/1990
Title:
SUB-MICRON BIPOLAR DEVICES WITH METHOD FOR FORMING SUB-MICRON CONTACTS
18
Patent #:
Issue Dt:
02/06/2001
Application #:
09046010
Filing Dt:
03/23/1998
Title:
USE OF CONVERGING BEAMS FOR TRANSMITTING ELECTROMAGNETIC ENERGY TO POWER DEVICES FOR DIE TESTING
19
Patent #:
Issue Dt:
08/10/1999
Application #:
09070314
Filing Dt:
04/30/1998
Title:
PHYSICAL VAPOR DEPOSITION CHAMBER
20
Patent #:
Issue Dt:
01/15/2002
Application #:
09160834
Filing Dt:
09/25/1998
Title:
METHOD FOR FABRICATING INTERPOLY DIELECTRICS IN NON-VOLATILE STACKED-GATE MEMORY STRUCTURES
21
Patent #:
Issue Dt:
10/24/2000
Application #:
09405856
Filing Dt:
09/24/1999
Title:
METHOD FOR LOCATING ACTIVE SUPPORT CIRCUITRY ON AN INTEGRATED CIRCUIT FABRICATION DIE
22
Patent #:
Issue Dt:
05/15/2001
Application #:
09418399
Filing Dt:
10/14/1999
Title:
METHOD AND APPARATUS FOR PRE-CONDITIONING FLASH MEMORY DEVICES
23
Patent #:
Issue Dt:
11/12/2002
Application #:
09499244
Filing Dt:
02/07/2000
Title:
TRANSPARENT PHASE SHIFT MASK FOR FABRICATION OF SMALL FEATURE SIZES
Assignor
1
Exec Dt:
06/23/2003
Assignee
1
4321 JAMBOREE ROAD
NEWPORT BEACH, CALIFORNIA 92660
Correspondence name and address
FARJAMI & FARJAMI LLP
MICHAEL FARJAMI, ESQ.
16148 SAND CANYON
IRVINE, CALIFORNIA 92618

Search Results as of: 05/26/2024 12:43 PM
If you have any comments or questions concerning the data displayed, contact PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified: August 25, 2017 v.2.6
| .HOME | INDEX| SEARCH | eBUSINESS | CONTACT US | PRIVACY STATEMENT