Total properties:
125
Page
2
of
2
Pages:
1 2
|
|
Patent #:
|
|
Issue Dt:
|
12/22/2015
|
Application #:
|
13925831
|
Filing Dt:
|
06/25/2013
|
Publication #:
|
|
Pub Dt:
|
12/25/2014
| | | | |
Title:
|
WIRELESS COMMUNICATION APPARATUS AND METHOD
|
|
|
Patent #:
|
|
Issue Dt:
|
05/19/2015
|
Application #:
|
13926652
|
Filing Dt:
|
06/25/2013
|
Publication #:
|
|
Pub Dt:
|
12/25/2014
| | | | |
Title:
|
METHOD FOR FABRICATING MULTIPLE TYPES OF MEMS DEVICES
|
|
|
Patent #:
|
|
Issue Dt:
|
09/01/2015
|
Application #:
|
13927936
|
Filing Dt:
|
06/26/2013
|
Publication #:
|
|
Pub Dt:
|
03/06/2014
| | | | |
Title:
|
RECONFIGURABLE FLIP-FLOP
|
|
|
Patent #:
|
|
Issue Dt:
|
04/14/2015
|
Application #:
|
13928666
|
Filing Dt:
|
06/27/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
NON-VOLATILE MEMORY (NVM) AND HIGH VOLTAGE TRANSISTOR INTEGRATION
|
|
|
Patent #:
|
|
Issue Dt:
|
04/12/2016
|
Application #:
|
13928671
|
Filing Dt:
|
06/27/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
SYSTEM WITH FEATURE OF SAVING DYNAMIC POWER OF FLIP-FLOP BANKS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2016
|
Application #:
|
13928876
|
Filing Dt:
|
06/27/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
PACKAGED SEMICONDUCTOR DEVICE
|
|
|
Patent #:
|
|
Issue Dt:
|
07/18/2017
|
Application #:
|
13929002
|
Filing Dt:
|
06/27/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
OPTIMIZING ERROR PARSING IN AN INTEGRATED DEVELOPMENT ENVIRONMENT
|
|
|
Patent #:
|
|
Issue Dt:
|
04/07/2015
|
Application #:
|
13929013
|
Filing Dt:
|
06/27/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
METHOD AND SYSTEM FOR RECOVERING FROM TRANSISTOR AGING USING HEATING
|
|
|
Patent #:
|
|
Issue Dt:
|
09/09/2014
|
Application #:
|
13929114
|
Filing Dt:
|
06/27/2013
|
Title:
|
MULTI-LAYER PROCESS-INDUCED DAMAGE TRACKING AND REMEDIATION
|
|
|
Patent #:
|
|
Issue Dt:
|
07/26/2016
|
Application #:
|
13929688
|
Filing Dt:
|
06/27/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
SEMICONDUCTOR PACKAGE HAVING WIRE BOND WALL TO REDUCE COUPLING
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2017
|
Application #:
|
13929924
|
Filing Dt:
|
06/28/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
METHODS AND STRUCTURES FOR A SPLIT GATE MEMORY CELL STRUCTURE
|
|
|
Patent #:
|
|
Issue Dt:
|
10/11/2016
|
Application #:
|
13930236
|
Filing Dt:
|
06/28/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
DIE-TO-DIE INDUCTIVE COMMUNICATION DEVICES AND METHODS
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13930250
|
Filing Dt:
|
06/28/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
DIE-TO-DIE INDUCTIVE COMMUNICATION DEVICES AND METHODS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/31/2015
|
Application #:
|
13930657
|
Filing Dt:
|
06/28/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
INTEGRATED CIRCUITS AND METHODS FOR MONITORING FORWARD AND REVERSE BACK BIASING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/25/2015
|
Application #:
|
13931945
|
Filing Dt:
|
06/30/2013
|
Publication #:
|
|
Pub Dt:
|
01/01/2015
| | | | |
Title:
|
METHOD FOR DETECTING BANK COLLISION AT A MEMORY AND DEVICE THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
05/24/2016
|
Application #:
|
13977076
|
Filing Dt:
|
06/28/2013
|
Publication #:
|
|
Pub Dt:
|
11/14/2013
| | | | |
Title:
|
METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13977082
|
Filing Dt:
|
06/28/2013
|
Publication #:
|
|
Pub Dt:
|
10/31/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT DEVICE AND METHOD FOR CALCULATING A PREDICATE VALUE
|
|
|
Patent #:
|
|
Issue Dt:
|
08/09/2016
|
Application #:
|
13977087
|
Filing Dt:
|
06/28/2013
|
Publication #:
|
|
Pub Dt:
|
11/07/2013
| | | | |
Title:
|
PHASED-ARRAY RECEIVER, RADAR SYSTEM AND VEHICLE
|
|
|
Patent #:
|
|
Issue Dt:
|
09/15/2015
|
Application #:
|
13988366
|
Filing Dt:
|
05/20/2013
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT DEVICE, SIGNAL PROCESSING SYSTEM AND METHOD FOR PREFETCHING LINES OF DATA THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
08/16/2016
|
Application #:
|
13988425
|
Filing Dt:
|
05/20/2013
|
Publication #:
|
|
Pub Dt:
|
09/05/2013
| | | | |
Title:
|
METHOD FOR ENABLING CALIBRATION DURING START-UP OF A MICRO CONTROLLER UNIT AND INTEGRATED CIRCUIT THEREFOR
|
|
|
Patent #:
|
|
Issue Dt:
|
12/02/2014
|
Application #:
|
13988549
|
Filing Dt:
|
05/21/2013
|
Publication #:
|
|
Pub Dt:
|
09/19/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT AND A METHOD OF POWER MANAGEMENT OF AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
01/26/2016
|
Application #:
|
13988821
|
Filing Dt:
|
05/22/2013
|
Publication #:
|
|
Pub Dt:
|
07/03/2014
| | | | |
Title:
|
ERROR CORRECTING DEVICE, METHOD FOR MONITORING AN ERROR CORRECTING DEVICE AND DATA PROCESSING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2016
|
Application #:
|
13989280
|
Filing Dt:
|
05/23/2013
|
Publication #:
|
|
Pub Dt:
|
09/12/2013
| | | | |
Title:
|
METHOD AND APPARATUS FOR MANAGING POWER IN A MULTI-CORE PROCESSOR
|
|
|
Patent #:
|
|
Issue Dt:
|
03/03/2015
|
Application #:
|
13989288
|
Filing Dt:
|
05/23/2013
|
Publication #:
|
|
Pub Dt:
|
09/26/2013
| | | | |
Title:
|
SWITCHING ARRANGEMENT, INTEGRATED CIRCUIT COMPRISING SAME, METHOD OF CONTROLLING A SWITCHING ARRANGEMENT, AND RELATED COMPUTER PROGRAM PRODUCT
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
13995190
|
Filing Dt:
|
06/18/2013
|
Publication #:
|
|
Pub Dt:
|
10/17/2013
| | | | |
Title:
|
INTEGRATED CIRCUIT DEVICE AND METHOD FOR PERFORMING CONDITIONAL NEGATION OF DATA
|
|