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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:023312/0842   Pages: 8
Recorded: 09/29/2009
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 5
1
Patent #:
Issue Dt:
05/20/2008
Application #:
10765613
Filing Dt:
01/27/2004
Publication #:
Pub Dt:
11/04/2004
Title:
APPARATUS AND METHOD FOR POLISHING SEMICONDUCTOR WAFERS USING ONE OR MORE PIVOTABLE LOAD-AND-UNLOAD CUPS
2
Patent #:
Issue Dt:
05/29/2007
Application #:
10829593
Filing Dt:
04/21/2004
Publication #:
Pub Dt:
10/21/2004
Title:
APPARATUS AND METHOD FOR POLISHING SEMICONDUCTOR WAFERS USING ONE OR MORE POLISHING SURFACES
3
Patent #:
Issue Dt:
05/06/2008
Application #:
11208158
Filing Dt:
08/18/2005
Publication #:
Pub Dt:
03/02/2006
Title:
APPARATUS AND METHOD FOR POLISHING SEMICONDUCTOR WAFERS USING PIVOTABLE LOAD/UNLOAD CUPS
4
Patent #:
Issue Dt:
07/03/2007
Application #:
11270270
Filing Dt:
11/08/2005
Publication #:
Pub Dt:
05/11/2006
Title:
METHODS FOR FABRICATING ONE OR MORE METAL DAMASCENE STRUCTURES IN A SEMICONDUCTOR WAFER
5
Patent #:
Issue Dt:
04/29/2008
Application #:
11680588
Filing Dt:
02/28/2007
Publication #:
Pub Dt:
09/06/2007
Title:
POLISHING HEAD FOR POLISHING SEMICONDUCTOR WAFERS
Assignor
1
Exec Dt:
07/21/2009
Assignee
1
3731 WILSHIRE BLVD., #420
LOS ANGELES, CALIFORNIA 90010
Correspondence name and address
NARA BANK (NOTE DEPT.)
3731 WILSHIRE BLVD., #420
LOS ANGELES, CA 90010

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