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Patent #:
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Issue Dt:
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04/26/1994
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Application #:
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07969789
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Filing Dt:
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10/29/1992
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Title:
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METHOD FOR INSERTING A PATH INSTRUCTION DURING COMPLIATION OF COMUTER PROGRAMS FOR PROCESSORS HAVING MULTIPLE FUNCTIONAL UNITS
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Patent #:
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Issue Dt:
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08/16/1994
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Application #:
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07973598
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Filing Dt:
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11/09/1992
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Title:
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DUAL LEVEL SCHEDULING OF PROCESSES TO MULTIPLE PARALLEL REGIONS OF A MULTI-THREADED PROGRAM ON A TIGHTLY COUPLED MULTIPROCESSOR COMPUTER SYSTEM
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Patent #:
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Issue Dt:
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08/30/1994
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Application #:
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07983086
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Filing Dt:
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11/19/1992
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Title:
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APPARATUS FOR COOLING DAUGHTER BOARDS
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Patent #:
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Issue Dt:
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07/02/1996
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Application #:
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07983979
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Filing Dt:
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11/30/1992
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Title:
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DIRECTION ORDER PRIORITY ROUTING OF PACKETS BETWEEN NODES IN A NETWORKED SYSTEM
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Patent #:
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Issue Dt:
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12/02/1997
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Application #:
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07993016
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Filing Dt:
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12/18/1992
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Title:
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A COMPUTER-IMPLEMENTED METHOD AND AN APPARATUS FOR CONVERTING DATA ACCORDING TO A SELECTED DATA TRANSFORMATION
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Patent #:
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Issue Dt:
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02/27/2001
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Application #:
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08003000
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Filing Dt:
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01/11/1993
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Title:
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METHOD AND APPARATUS FOR USER SIDE SCHEDULING IN A MULTIPROCESSOR OPERATING SYSTEM PROGRAM THAT IMPLEMENTS DISTRIBUTIVE SCHEDULING OF PROCESSES
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Patent #:
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Issue Dt:
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12/14/1993
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Application #:
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08009576
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Filing Dt:
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01/26/1993
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Title:
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RETAINING AND RELEASE MECHANISM FOR COMPUTER STORAGE DEVICES INCLUDING A PAWL LATCH ASSEMBLY
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Patent #:
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Issue Dt:
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09/14/1993
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Application #:
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08013165
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Filing Dt:
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02/02/1993
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Title:
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SYNCHRONIZED STEREOSCOPIC DISPLAY SYSTEM
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Patent #:
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Issue Dt:
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07/16/1996
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Application #:
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08027049
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Filing Dt:
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03/05/1993
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Title:
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OPTICAL CLOCK DISTRIBUTION SYSTEM
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Patent #:
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Issue Dt:
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02/01/1994
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Application #:
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08033423
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Filing Dt:
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03/18/1993
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Title:
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ERROR RECOVERY METHOD AND APPARATUS FOR HIGH PERFORMANCE DISK DRIVES
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Patent #:
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Issue Dt:
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09/26/1995
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Application #:
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08038143
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Filing Dt:
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03/26/1993
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Title:
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METHOD FOR USE IN DESIGNING AN ARBITRARILY SHAPED OBJECT
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Patent #:
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Issue Dt:
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06/18/1996
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Application #:
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08042801
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Filing Dt:
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03/23/1993
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Title:
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METHOD AND APPARATUS FOR DISPLAYING DATA WITHIN A THREE-DIMENSIONAL INFORMATION LANDSCAPE
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Patent #:
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Issue Dt:
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01/25/1994
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Application #:
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08056650
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Filing Dt:
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05/03/1993
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Title:
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PRINTED CIRCUIT BOARD WITH COOLING MONITORING SYSTEM
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Patent #:
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Issue Dt:
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09/19/1995
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Application #:
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08072655
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Filing Dt:
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06/04/1993
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Title:
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SYSTEM HAVING INTEGRATED DISPATCHER FOR SELF SCHEDULING PROCESSORS TO EXECUTE MULTIPLE TYPES OF PROCESSES
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Patent #:
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Issue Dt:
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11/14/1995
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Application #:
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08098204
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Filing Dt:
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07/28/1993
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Title:
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METHOD FOR ADJUSTING CLOCK SKEW
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Patent #:
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Issue Dt:
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05/09/1995
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Application #:
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08098503
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Filing Dt:
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07/28/1993
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Title:
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METHOD OF ADJUSTING FOR CLOCK SKEW
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Patent #:
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Issue Dt:
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04/02/1996
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Application #:
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08128080
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Filing Dt:
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09/29/1993
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Title:
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A SYSTEM AND METHOD OF IMPLEMENTING READ RESOURCES TO MAINTAIN CACHE COHERENCY IN A MULTIPROCESSOR ENVIRONMENT PERMITTING SPLIT TRANSACTIONS
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Patent #:
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Issue Dt:
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08/05/1997
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Application #:
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08128081
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Filing Dt:
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09/29/1993
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Title:
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SYSTEM AND METHOD FOR PIGGYBACKING OF READ RESPONSES ON A SHARED MEMORY MULTIPROCESSOR BUS
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Patent #:
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Issue Dt:
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04/16/1996
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Application #:
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08128082
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Filing Dt:
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09/29/1993
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Title:
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A SYSTEM AND METHOD FOR FAIR ARBITRATION ON A MULTI-DOMAIN MULTIPROCESSOR BUS
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Patent #:
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Issue Dt:
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08/06/1996
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Application #:
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08128720
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Filing Dt:
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09/30/1993
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Title:
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SYSTEM AND METHOD FOR GENERATING A READ-MODIFY-WRITE OPERATION
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Patent #:
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Issue Dt:
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11/22/1994
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Application #:
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08129437
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Filing Dt:
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09/30/1993
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Title:
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MULTIPROCESSING SYSTEM USING INDIRECT ADDRESSING TO ACCESS RESPECTIVE LOCAL SEMAPHORE REGISTERS BITS FOR SETTING THE BIT OR BRANCHING IF THE BIT IS SET
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Patent #:
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Issue Dt:
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07/09/1996
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Application #:
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08141259
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Filing Dt:
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10/22/1993
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Title:
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METHOD AND APPARATUS FOR LOCKING SHARED MEMORY LOCATIONS IN MULTIPROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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02/21/1995
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Application #:
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08149967
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Filing Dt:
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11/10/1993
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Title:
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CONFIGURABLE SPARE MEMORY CHIPS
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Patent #:
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Issue Dt:
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06/09/1998
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Application #:
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08165118
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Filing Dt:
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12/10/1993
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Title:
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SYSTEM AND METHOD OF ADDRESSING DISTRIBUTED MEMORY WITHIN A MASSIVELY PARALLEL PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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07/18/1995
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Application #:
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08165265
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Filing Dt:
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12/10/1993
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Title:
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BARRIER SYNCHRONIZATION FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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12/10/1996
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Application #:
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08165266
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Filing Dt:
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12/10/1993
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Title:
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SYSTEM FOR ALLOCATING MESSAGES BETWEEN VIRTUAL CHANNELS TO AVOID DEADLOCK AND TO OPTIMIZE THE AMOUNT OF MESSAGE TRAFFIC ON EACH TYPE OF VIRTUAL CHANNEL
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Patent #:
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Issue Dt:
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12/17/1996
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Application #:
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08165379
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Filing Dt:
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12/10/1993
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Title:
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METHOD FOR THE DYNAMIC ALLOCATION OF ARRAY SIZES IN A MULTIPROCESSOR SYSTEM
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Patent #:
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Issue Dt:
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12/09/1997
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Application #:
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08165388
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Filing Dt:
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12/10/1993
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Title:
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RECURSIVE ADDRESS CENTRIFUGE FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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05/23/1995
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Application #:
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08165747
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Filing Dt:
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12/10/1993
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Title:
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REPETITIVE SIGNAL DETECTOR FOR PREVENTING THERMAL RUNAWAY
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08165814
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Filing Dt:
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12/13/1993
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Title:
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VIRTUAL TO LOGICAL TO PHYSICAL ADDRESS TRANSLATION FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEMS
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Patent #:
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Issue Dt:
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10/15/1996
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Application #:
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08166293
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Filing Dt:
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12/13/1993
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Title:
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METHOD OF MANAGING DISTRIBUTED MEMORY WITHIN A MASSIVELY PARALLEL PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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12/03/1996
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Application #:
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08166443
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Filing Dt:
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12/13/1993
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Title:
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MESSAGING FACILITY WITH HARDWARE TAIL POINTER AND SOFTWARE IMPLEMENTED HEAD POINTER MESSAGE QUEUE FOR DISTRIBUTED MEMORY MASSIVELY PARALLEL PROCESSING SYSTEM
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08166451
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Filing Dt:
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12/13/1993
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Title:
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METHOD FOR THE DYNAMIC ALLOCATION OF PAGE SIZES IN VIRTUAL MEMORY
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Patent #:
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Issue Dt:
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10/15/1996
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Application #:
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08168166
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Filing Dt:
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12/17/1993
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Title:
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DISK DRIVE BRACKET
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Patent #:
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Issue Dt:
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03/12/1996
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Application #:
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08173923
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Filing Dt:
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12/28/1993
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Title:
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METHOD AND APPARATUS FOR A MULTIPROCESSOR RESOURCE LOCKOUT INSTRUCTION
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Patent #:
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Issue Dt:
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09/17/1996
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Application #:
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08186248
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Filing Dt:
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01/25/1994
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Title:
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SYSTEM AND METHOD OF GENERATING OBJECT CODE USING AGGREGATE INSTRUCTION MOVEMENT
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Patent #:
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Issue Dt:
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02/13/1996
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Application #:
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08186268
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Filing Dt:
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01/25/1994
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Title:
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LOOP SCHEDULER
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Patent #:
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Issue Dt:
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02/14/1995
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Application #:
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08200921
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Filing Dt:
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02/22/1994
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Title:
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REAL TIME I/O OPERATION IN A VECTOR PROCESSING COMPUTER SYSTEM BY RUNNING DESIGNATED PROCESSORS IN PRIVILEGED MODE AND BYPASS THE OPERATING SYSTEM
|
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|
|
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Patent #:
|
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Issue Dt:
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11/10/1998
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Application #:
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08205990
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Filing Dt:
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03/04/1994
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Title:
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ARRANGEMENT FOR MODIFYING ELECTRICAL PRINTED CIRCUIT BOARDS
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|
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Patent #:
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Issue Dt:
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01/02/1996
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Application #:
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08218997
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Filing Dt:
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03/29/1994
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Title:
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VECTOR SHIFT FUNCTIONAL UNIT FOR SUCCESSIVELY SHIFTING OPERANDS STORED IN A VECTOR REGISTER BY CORRESPONDING SHIFT COUNTS STORED IN ANOTHER VECTOR REGISTER
|
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Patent #:
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Issue Dt:
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08/15/1995
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Application #:
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08231996
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Filing Dt:
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04/21/1994
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Title:
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OPTICAL CLOCK DISTRIBUTION METHOD AND APPARATUS
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Patent #:
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Issue Dt:
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12/06/1994
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Application #:
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08233222
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Filing Dt:
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04/26/1994
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Title:
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APPARATUS AND METHOD FOR TESTING OF NEW OPERATING SYSTEMS THROUGH PRIVILEGED INSTRUCTION TRAPPING
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|
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Patent #:
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Issue Dt:
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01/10/1995
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Application #:
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08249084
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Filing Dt:
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05/25/1994
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Title:
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METHOD AND APPARATUS FOR SEPARATE MARK AND WAIT INSTRUCTIONS FOR PROCESSORS HAVING MULTIPLE MEMORY PORTS
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|
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Patent #:
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Issue Dt:
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10/01/1996
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Application #:
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08268660
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Filing Dt:
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06/29/1994
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Title:
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INTERLEAVED MEMORY ACCESS SYSTEM HAVING VARIABLE-SIZED SEGMENTS LOGICAL ADDRESS SPACES AND MEANS FOR DIVIDING/MAPPING PHYSICAL ADDRESS INTO HIGHER AND LOWER ORDER ADDRESSES
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Patent #:
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Issue Dt:
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06/11/1996
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Application #:
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08269444
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Filing Dt:
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06/30/1994
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Title:
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THREE DIMENSIONAL MODEL WITH THREE DIMENSIONAL POINTERS AND MULTIMEDIA FUNCTIONS LINKED TO THE POINTERS
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Patent #:
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Issue Dt:
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02/14/1995
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Application #:
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08277776
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Filing Dt:
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07/20/1994
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Title:
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RESPONDING TO SERVICE REQUESTS USING MINIMAL SYSTEM-SIDE CONTEXT IN A MULTIPROCESSOR ENVIRONMENT
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|
|
|
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Patent #:
|
|
Issue Dt:
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11/25/1997
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Application #:
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08294823
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Filing Dt:
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08/26/1994
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|
Title:
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SYSTEM AND METHOD FOR CONDITIONALLY COMPILING A SOFTWARE COMPILATION UNIT
|
|
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|
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Patent #:
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Issue Dt:
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03/18/1997
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Application #:
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08325155
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Filing Dt:
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10/20/1994
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Title:
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SYSTEM AND METHOD FOR ENABLING, WITHOUT RECOMPILATION, MODIFICATION OF CLASS DEFINITIONS AND IMPLEMENTATIONS IN AN OBJECT-ORIENTED COMPUTER PROGRAM
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|
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Patent #:
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Issue Dt:
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04/29/1997
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Application #:
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08331730
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Filing Dt:
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10/31/1994
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Title:
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EXTENDIBLE CLOCK MECHANISM
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Patent #:
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Issue Dt:
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06/02/1998
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Application #:
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08333133
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Filing Dt:
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11/01/1994
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Title:
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STREAM BUFFERS FOR HIGH-PERFORMANCE COMPUTER MEMORY SYSTEMS
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Patent #:
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Issue Dt:
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01/09/2001
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Application #:
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08340238
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Filing Dt:
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11/16/1994
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Title:
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APPARATUS AND METHOD FOR TESTING USING CLOCKED TEST ACCESS PORT CONTROLLER FOR LEVEL SENSITIVE SCAN DESIGNS
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08344236
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Filing Dt:
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11/23/1994
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Title:
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OUTER LOOP VECTORIZATION
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Patent #:
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Issue Dt:
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02/10/1998
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Application #:
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08348056
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Filing Dt:
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12/01/1994
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Title:
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ASSOCIATIVE SCALAR DATA CACHE WITH WRITE-THROUGH CAPABILITIES FOR A VECTOR PROCESSOR
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Patent #:
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Issue Dt:
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06/04/1996
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Application #:
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08363599
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Filing Dt:
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12/23/1994
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Title:
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A CENTRAL PROCESSING UNIT FOR PROCESSING A PLURALITY OF THREADS USING DEDICATED GENERAL PURPOSE REGISTERS AND MASQUE REGISTER FOR PROVIDING ACCESS TO THE REGISTERS
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Patent #:
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Issue Dt:
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06/04/1996
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Application #:
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08379123
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Filing Dt:
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01/27/1995
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Title:
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METHOD AND APPARATUS FOR ACCESSING GLOBAL REGISTERS IN A MULTIPROCESSOR SYSTEM
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|
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Patent #:
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Issue Dt:
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06/17/1997
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Application #:
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08395320
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Filing Dt:
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02/28/1995
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Title:
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METHOD AND APPARATUS FOR CHAINING VECTOR INSTRUCTIONS
|
|
|
|
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Patent #:
|
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Issue Dt:
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01/23/1996
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Application #:
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08406571
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Filing Dt:
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03/20/1995
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Title:
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BOUNDARY SCAN TESTING USING CLOCKED SIGNAL
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|
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|
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Patent #:
|
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Issue Dt:
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01/07/1997
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Application #:
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08407808
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Filing Dt:
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03/20/1995
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|
Title:
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COMMUNICATION PROTOCOL FOR TRANSFERRING INFORMATION ACROSS A #S SERIAL COMMUNICATION LINK
|
|
|
|
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Patent #:
|
|
Issue Dt:
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12/23/1997
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Application #:
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08421566
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Filing Dt:
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04/13/1995
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|
Title:
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ADAPTIVE ROUTING MECHANISM FOR TORUS INTERCONNECTION NETWORK
|
|
|
|
|
Patent #:
|
|
Issue Dt:
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08/19/1997
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Application #:
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08422072
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Filing Dt:
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04/13/1995
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Title:
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SYSTEM FOR RANDOMLY MODIFYING VIRTUAL CHANNEL ALLOCATION AND ACCEPTING THE RANDOM MODIFICATION BASED ON THE COST FUNCTION
|
|
|
|
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Patent #:
|
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Issue Dt:
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04/07/1998
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Application #:
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08431704
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Filing Dt:
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04/27/1995
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Title:
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EFFICIENT ULTRA LOW DROP OUT POWER REGULATOR
|
|
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|
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Patent #:
|
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Issue Dt:
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09/16/1997
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Application #:
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08435451
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Filing Dt:
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05/05/1995
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Title:
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HIERARCHICAL FAT HYPERCUBE ARCHITECTURE FOR PARALLEL PROCESSING SYSTEMS
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Patent #:
|
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Issue Dt:
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02/24/1998
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Application #:
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08435452
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Filing Dt:
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05/05/1995
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Title:
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PROGRAMMABLE, DISTRIBUTED NETWORK ROUTING
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Patent #:
|
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Issue Dt:
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06/16/1998
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Application #:
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08435453
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Filing Dt:
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05/05/1995
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Title:
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A SYSTEM AND METHOD FOR THE SYNCHRONOUS TRANSMISSION OF DATA IN A COMMUNICATION NETWORK UTILIZING A SOURCE CLOCK SIGNAL TO LATCH SERIAL DATA INTO FIRST REGISTERS AND A HANDSHAKE SIGNAL TO LATCH PARALLEL DATA INTO SECOND REGISTERS
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Patent #:
|
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Issue Dt:
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10/13/1998
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Application #:
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08435455
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Filing Dt:
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05/05/1995
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Title:
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DISTRIBUTED GLOBAL CLOCK SYSTEM
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Patent #:
|
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Issue Dt:
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10/28/1997
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Application #:
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08435456
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Filing Dt:
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05/05/1995
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Title:
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SYSTEM AND METHOD FOR NETWORK EXPLORATION AND ACCESS
|
|
|
|
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Patent #:
|
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Issue Dt:
|
07/28/1998
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Application #:
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08435459
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Filing Dt:
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05/05/1995
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Title:
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SYSTEM AND METHOD FOR MAINTAINING COHERENCY OF VIRTUAL-TO-PHYSICAL MEMORY TRANLATIONS IN A MULTIPROCESSOR COMPUTER
|
|
|
|
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Patent #:
|
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Issue Dt:
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10/21/1997
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Application #:
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08435460
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Filing Dt:
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05/05/1995
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Title:
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DIRECTORY-BASED COHERENCE PROTOCOL ALLOWING EFFICIENT DROPPING OF CLEAN-EXCLUSIVE DATA
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Patent #:
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Issue Dt:
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11/23/1999
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Application #:
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08435462
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Filing Dt:
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05/05/1995
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Title:
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SYSTEM AND METHOD FOR MULTIPROCESSOR PARTITIONING TO SUPPORT HIGH AVAILABILITY
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Patent #:
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Issue Dt:
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05/27/1997
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Application #:
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08435463
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Filing Dt:
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05/05/1995
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Title:
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CACHE COHERENCY USING FLEXIBLE DIRECTORY BIT VECTORS
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Patent #:
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Issue Dt:
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02/24/1998
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Application #:
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08450251
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Filing Dt:
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05/25/1995
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Title:
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BARRIER AND EUREKA SYNCHRONIZATION ARCHITECTURE FOR MULTIPROCESSORS
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Patent #:
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Issue Dt:
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03/31/1998
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Application #:
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08455238
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Filing Dt:
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05/31/1995
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Title:
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SYSTEM AND METHOD FOR OPTIMIZING A SOURCE CODE REPRESENTATION AS A FUNCTION OF RESOURCE UTILIZATION
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Patent #:
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Issue Dt:
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07/29/1997
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Application #:
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08478802
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Filing Dt:
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06/07/1995
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Title:
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A COMPUTER-IMPLEMENTED METHOD AND AN APPARATUS FOR INPUTTING DATA STRUCTURE CHARACTERISTICS
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Patent #:
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Issue Dt:
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01/28/1997
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Application #:
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08478815
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Filing Dt:
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06/07/1995
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Title:
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VECTOR PROCESSOR HAVING FUNCTIONAL UNIT PATHS OF DIFFERING PIPELINE LENGTHS
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Patent #:
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Issue Dt:
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02/10/1998
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Application #:
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08481060
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Filing Dt:
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06/07/1995
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Title:
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DATA PROCESSING SYSTEM FOR PROCESSING ONE AND TWO PARCEL INSTRUCTIONS
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Patent #:
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Issue Dt:
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01/06/1998
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Application #:
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08484103
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Filing Dt:
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06/07/1995
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Title:
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METHOD OF PROCESSING CONDITIONAL BRANCH INSTRUCTIONS IN SCALAR/VECTOR PROCESSOR
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Patent #:
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Issue Dt:
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04/22/1997
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Application #:
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08484124
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Filing Dt:
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06/07/1995
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Title:
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METHOD OF PROCESSING A SEQUENCE OF CONDITIONAL VECTOR IF STATEMENTS
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Patent #:
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Issue Dt:
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04/28/1998
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Application #:
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08485017
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Filing Dt:
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06/07/1995
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Title:
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PARTITIONED ADDRESSING APPARATUS FOR VECTOR/SCALAR REGISTERS
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Patent #:
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Issue Dt:
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08/19/1997
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Application #:
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08486612
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Filing Dt:
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06/07/1995
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Title:
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VECTOR/SCALAR PROCESSOR WITH SIMULTANEOUS PROCESSING AND INSTRUCTION CACHE FILLING
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Patent #:
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Issue Dt:
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08/06/1996
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Application #:
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08487952
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Filing Dt:
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06/07/1995
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Title:
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VECTOR PROCESSOR HAVING REGISTERS FOR CONTROL BY VECTOR REGISTERS
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08520408
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Filing Dt:
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08/29/1995
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Title:
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HEATSINK AND METHOD OF FORMING A HEATSINK
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Patent #:
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Issue Dt:
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07/13/1999
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Application #:
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08521027
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Filing Dt:
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08/29/1995
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Title:
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CROSS-MODULE OPTIMIZATION FOR DYNAMICALLY-SHARED PROGRAMS AND LIBRARIES
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Patent #:
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Issue Dt:
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12/08/1998
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Application #:
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08521566
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Filing Dt:
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08/30/1995
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Title:
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VECTOR WORD SHIFT BY VO SHIFT COUNT IN VECTOR SUPERCOMPUTER PROCESSOR
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Patent #:
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Issue Dt:
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10/14/1997
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Application #:
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08522953
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Filing Dt:
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09/01/1995
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Title:
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FOUR-DIMENSIONAL GRAPHICAL USER INTERFACE
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Patent #:
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Issue Dt:
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10/05/1999
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Application #:
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08539524
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Filing Dt:
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10/06/1995
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Title:
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SYSTEM AND MERTHOD FOR UNCACHED STORE BUFFERING IN A MICROPROCESSOR
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Patent #:
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Issue Dt:
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11/18/1997
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Application #:
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08541803
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Filing Dt:
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10/10/1995
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Title:
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CONFIGURING OF NETWORKED SYSTEM TO PERMIT REPLACEMENT OF FAILED NODES AND SELECTION OF ALTERNATE PATHS
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Patent #:
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Issue Dt:
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11/03/1998
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Application #:
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08544537
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Filing Dt:
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10/18/1995
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Title:
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ACKNOWLEDGE TRIGGERED FORWARDING OF EXTERNAL BLOCK DATA RESPONSES IN A MICROPROCESSOR
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Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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08550992
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Filing Dt:
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10/31/1995
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Title:
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VIRTUAL MAINTENANCE NETWORK IN MULTIPROCESSING SYSTEM HAVING A NON- FLOW CONTROLLED VIRTUAL MAINTENANCE CHANNEL
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Patent #:
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Issue Dt:
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08/26/1997
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Application #:
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08552801
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Filing Dt:
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11/03/1995
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Title:
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HIGH PERFORMANCE SPIRAL HEAT SINK
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Patent #:
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Issue Dt:
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08/04/1998
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Application #:
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08561183
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Filing Dt:
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11/20/1995
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Title:
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SYSTEM AND METHOD FOR ALLOWING A PERFORMER TO CONTROL AND INTERACT WITH AN ON-STAGE DISPLAY DEVICE
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08564404
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Filing Dt:
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11/29/1995
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Title:
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READILY REMOVABLE HEAT SINK ASSEMBLY
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Patent #:
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Issue Dt:
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09/23/1997
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Application #:
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08567082
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Filing Dt:
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12/04/1995
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Title:
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SCAN CHAIN FOR SHITING THE STATE OF A PROCESSOR INTO MEMORY AT A SPECIFIED POINT DURING SYSTEM OPERATION FOR TESTING PURPOSES
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Patent #:
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Issue Dt:
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08/21/2001
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Application #:
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08569463
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Filing Dt:
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12/08/1995
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Title:
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OPERATING SYSTEM HAVING A MECHANISM FOR HANDLING A GROUP OF RELATED PROCESSES REDISING ON SEPARATE MACHINES
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Patent #:
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Issue Dt:
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07/21/1998
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Application #:
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08571366
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Filing Dt:
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12/13/1995
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Title:
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SYSTEM AND METHOD FOR COORDINATING COMMUNICATION BETWEEN LAYERS OF A LAYERED COMMUNICATION SYSTEM
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Patent #:
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Issue Dt:
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09/02/1997
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Application #:
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08578997
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Filing Dt:
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12/27/1995
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Title:
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A SYSTEM AND METHOD OF IMPLEMENTING READ RESOURCES TO MAINTAIN CACHE COHERENCY IN A MULTIPROCESSOR ENVIRONMENT PERMITTING SPLIT TRANSACTIONS
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|
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Patent #:
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Issue Dt:
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09/01/1998
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Application #:
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08588844
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Filing Dt:
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01/19/1996
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Title:
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SYSTEM AND METHOD FOR AN ICONIC DRAG AND DROP INTERFACE FOR ELECTRONIC FILE TRANSFER
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Patent #:
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Issue Dt:
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01/20/1998
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Application #:
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08589532
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Filing Dt:
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01/22/1996
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Title:
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PROCESSOR-INCLUSIVE MEMORY MODULE
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|
|
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Patent #:
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|
Issue Dt:
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12/02/1997
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Application #:
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08590561
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Filing Dt:
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01/26/1996
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Title:
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METHOD FOR SELECTING A THREE-DIMENSIONAL OBJECT FROM A GRAPHICAL USER INTERFACE
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Patent #:
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Issue Dt:
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10/13/1998
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Application #:
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08590562
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Filing Dt:
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01/26/1996
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Title:
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COLLABORATIVE WORK ENVIRONMENT SUPPORTING THREE-DIMENSIONAL OBJECTS AND MULTIPLE, REMOTE PARTICIPANTS
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Patent #:
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Issue Dt:
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03/10/1998
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Application #:
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08592736
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Filing Dt:
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01/26/1996
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Title:
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SYSTEM AND METHOD TO REDUCE PHASE OFFSET AND PHASE JITTER IN PHASE-LOCKED AND DELAY-LOCKED LOOPS USING SELF-BIASED CIRCUITS
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