Patent Assignment Details
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| Reel/Frame: | 012775/0861 | |
| Pages: | 3 |
| | Recorded: | 04/12/2002 | | |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
3
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Patent #:
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Issue Dt:
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10/22/1991
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Application #:
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07483740
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Filing Dt:
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02/23/1990
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Title:
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STEP CUT TYPE INSULATED GATE SIT HAVING LOW-RESISTANCE ELECTRODE AND METHOD OF MANUFACTURING THE SAME
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Patent #:
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Issue Dt:
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12/08/1992
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Application #:
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07747699
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Filing Dt:
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08/20/1991
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Title:
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METHOD OF MANUFACTURING STEP CUT TYPE INSULATED GARE SIT HAVING LOW- RESISTANCE ELECTRODE
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Patent #:
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Issue Dt:
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12/12/1995
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Application #:
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08425250
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Filing Dt:
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04/17/1995
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Title:
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NOTCHED INSULATION GATE STATIC INDUCTION TRANSISTOR INTEGRATED CIRCUIT
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Assignee
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| KAWAUCHI, AOBA-KU, SENDAI-SHI |
| MIYAGI-KEN, JAPAN |
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Correspondence name and address
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OBLON, SPIVAK, MCCLELLAND, MAIER, ET AL
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MARVIN J. SPIVAK
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FOURTH FLOOR 1755 JEFFERSON DAVIS HWY
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ARLINGTON, VIRGINIA 22202
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