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Patent Assignment Details
NOTE:Results display only for issued patents and published applications. For pending or abandoned applications please consult USPTO staff.

Reel/Frame:017422/0868   Pages: 3
Recorded: 04/05/2006
Conveyance: CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
Total properties: 38
1
Patent #:
5581504
Issue Dt:
12/03/1996
Application #:
08557442
Filing Dt:
11/14/1995
Title:
NON-VOLATILE ELECTRICALLY ERASABLE MEMORY WITH PMOS TRANSISTOR NAND GATE STRUCTURE
2
Patent #:
5666307
Issue Dt:
09/09/1997
Application #:
08557514
Filing Dt:
11/14/1995
Title:
PMOS FLASH MEMORY CELL CAPABLE OF MULTI-LEVEL THRESHOLD VOLTAGE STORAGE
3
Patent #:
5687118
Issue Dt:
11/11/1997
Application #:
08557589
Filing Dt:
11/14/1995
Title:
PMOS MEMORY CELL WITH HOT ELECTRON INJECTION PROGRAMMING AND TUNNELLING ERASING
4
Patent #:
5736764
Issue Dt:
04/07/1998
Application #:
08560249
Filing Dt:
11/21/1995
Title:
PMOS FLASH EEPROM CELL WITH SINGLE POLY
5
Patent #:
5706227
Issue Dt:
01/06/1998
Application #:
08568544
Filing Dt:
12/07/1995
Title:
DOUBLE POLY SPLIT GATE PMOS FLASH MEMORY CELL
6
Patent #:
5691939
Issue Dt:
11/25/1997
Application #:
08568835
Filing Dt:
12/07/1995
Title:
TRIPLE POLY PMOS FLASH MEMORY CELL
7
Patent #:
5841165
Issue Dt:
11/24/1998
Application #:
08577405
Filing Dt:
12/22/1995
Title:
PMOS FLASH EEPROM CELL WITH SINGLE POLY
8
Patent #:
5625544
Issue Dt:
04/29/1997
Application #:
08639280
Filing Dt:
04/25/1996
Title:
CHARGE PUMP
9
Patent #:
5774406
Issue Dt:
06/30/1998
Application #:
08722429
Filing Dt:
10/03/1996
Title:
SWITCHING CIRCUIT FOR CONTROLLED TRANSITION BETWEEN HIGH PROGRAM AND ERASE VOLTAGES AND A POWER SUPPLY VOLTAGE FOR MEMORY CELLS
10
Patent #:
5687116
Issue Dt:
11/11/1997
Application #:
08727875
Filing Dt:
10/09/1996
Title:
PROGRAMMING PULSE RAMP CONTROL CIRCUIT
11
Patent #:
5777926
Issue Dt:
07/07/1998
Application #:
08738434
Filing Dt:
10/24/1996
Title:
ROW DECODER CIRCUIT FOR PMOS NON-VOLATILE MEMORY CELL WHICH USES CHANNEL HOT ELECTRONS FOR PROGRAMMING
12
Patent #:
5761121
Issue Dt:
06/02/1998
Application #:
08744699
Filing Dt:
10/31/1996
Title:
PMOS SINGLE-POLY NON-VOLATILE MEMORY STRUCTURE
13
Patent #:
5696728
Issue Dt:
12/09/1997
Application #:
08778802
Filing Dt:
01/03/1997
Title:
NEGATIVE VOLTAGE LEVEL SHIFT CIRCUIT
14
Patent #:
5889440
Issue Dt:
03/30/1999
Application #:
08784161
Filing Dt:
01/15/1997
Title:
ADAPTIVE FREQUENCY COMPENSATION TECHNIQUE
15
Patent #:
5723355
Issue Dt:
03/03/1998
Application #:
08785234
Filing Dt:
01/17/1997
Title:
METHOD TO INCORPORATE NON-VOLATILE MEMORY AND LOGIC COMPONENTS INTO A SINGLE SUB-0.3 MICRON FABRICATION PRODESS FOR EMBEDDED NON-VOLATILE MEMORY
16
Patent #:
5798967
Issue Dt:
08/25/1998
Application #:
08801414
Filing Dt:
02/22/1997
Title:
SENSING SCHEME FOR NON-VOLATILE MEMORIES
17
Patent #:
5796656
Issue Dt:
08/18/1998
Application #:
08803806
Filing Dt:
02/22/1997
Title:
ROW DECODER CIRCUIT FOR PMOS NON-VOLATILE MEMORY CELL WHICH USES ELECTRON TUNNELING FOR PROGRAMMING AND ERASING
18
Patent #:
5781471
Issue Dt:
07/14/1998
Application #:
08911816
Filing Dt:
08/15/1997
Title:
PMOS NON-VOLATILE LATCH FOR STORAGE OF REDUNDANCY ADDRESSES
19
Patent #:
5801994
Issue Dt:
09/01/1998
Application #:
08911968
Filing Dt:
08/15/1997
Title:
NON- VOLATILE MEMORY ARRAY ARCHITECTURE
20
Patent #:
5907484
Issue Dt:
05/25/1999
Application #:
08918744
Filing Dt:
08/25/1997
Title:
CHARGE PUMP
21
Patent #:
5952851
Issue Dt:
09/14/1999
Application #:
08931116
Filing Dt:
09/16/1997
Title:
BOOSTED VOLTAGE DRIVER
22
Patent #:
5912842
Issue Dt:
06/15/1999
Application #:
08947850
Filing Dt:
10/09/1997
Title:
NONVOLATILE PMOS TWO TRANSISTOR MEMORY CELL AND ARRAY
23
Patent #:
5966329
Issue Dt:
10/12/1999
Application #:
08948147
Filing Dt:
10/09/1997
Title:
APPARATUS AND METHOD FOR PROGRAMMING PMOS MEMORY CELLS
24
Patent #:
5909392
Issue Dt:
06/01/1999
Application #:
08948531
Filing Dt:
10/09/1997
Title:
PMOS MEMORY ARRAY HAVING OR GATE ARCHITECTURE
25
Patent #:
5973967
Issue Dt:
10/26/1999
Application #:
08985561
Filing Dt:
12/05/1997
Title:
PAPER BUFFER HAVING NEGATIVE VOLTAGE LEVEL SHIFTER
26
Patent #:
5982693
Issue Dt:
11/09/1999
Application #:
08987796
Filing Dt:
12/10/1997
Title:
SENSE AMPLIFIER WITH IMPROVED BIT LINE INITIALIZATION
27
Patent #:
5903497
Issue Dt:
05/11/1999
Application #:
08995682
Filing Dt:
12/22/1997
Title:
INTEGRATED PROGRAM VERIFY PAGE BUFFER
28
Patent #:
5943268
Issue Dt:
08/24/1999
Application #:
09001401
Filing Dt:
12/31/1997
Title:
NON-VOLATILE LATCH HAVING PMOS FLOATING GATE MEMORY CELLS
29
Patent #:
6204721
Issue Dt:
03/20/2001
Application #:
09082485
Filing Dt:
05/20/1998
Title:
METHOD AND APPARATUS FOR SWITCHING A WELL POTENTIAL IN RESPONSE TO AN OUTPUT VOLTAGE
30
Patent #:
5943265
Issue Dt:
08/24/1999
Application #:
09133481
Filing Dt:
08/12/1998
Title:
METHOD AND APPARATUS FOR SWITCHING NODES BETWEEN MULTIPLE POTENTIALS
31
Patent #:
6542955
Issue Dt:
04/01/2003
Application #:
09325027
Filing Dt:
06/03/1999
Title:
MICROCONTROLLER VIRTUAL MEMORY SYSTEM AND METHOD
32
Patent #:
6166954
Issue Dt:
12/26/2000
Application #:
09352027
Filing Dt:
07/14/1999
Title:
SINGLE POLY NON-VOLATILE MEMORY HAVING A PMOS WRITE PATH AND AN NMOS READ PATH
33
Patent #:
6851014
Issue Dt:
02/01/2005
Application #:
10104944
Filing Dt:
03/22/2002
Publication #:
US20030182495
Pub Dt:
09/25/2003
Title:
MEMORY DEVICE HAVING AUTOMATIC PROTOCOL DETECTION
34
Patent #:
6940315
Issue Dt:
09/06/2005
Application #:
10390136
Filing Dt:
03/14/2003
Publication #:
US20040178829
Pub Dt:
09/16/2004
Title:
High speed sense amplifier for memory output
35
Patent #:
NONE
Issue Dt:
Application #:
10753673
Filing Dt:
01/07/2004
Publication #:
US20050145924
Pub Dt:
07/07/2005
Title:
Source/drain adjust implant
36
Patent #:
7078761
Issue Dt:
07/18/2006
Application #:
10794564
Filing Dt:
03/05/2004
Publication #:
US20050199936
Pub Dt:
09/15/2005
Title:
NONVOLATILE MEMORY SOLUTION USING SINGLE-POLY PFLASH TECHNOLOGY
37
Patent #:
7009880
Issue Dt:
03/07/2006
Application #:
10921042
Filing Dt:
08/17/2004
Title:
NON-VOLATILE MEMORY ARCHITECTURE TO IMPROVE READ PERFORMANCE
38
Patent #:
7193895
Issue Dt:
03/20/2007
Application #:
11165977
Filing Dt:
06/24/2005
Publication #:
US20060291283
Pub Dt:
12/28/2006
Title:
REDUNDANT MEMORY CONTENT SUBSTITUTION APPARATUS AND METHOD
Assignor
1
PROGRAMMABLE MICROELECTRONICS CORP.
Exec Dt:
01/30/2006
Assignee
1
CHINGIS TECHNOLOGY CORPORATION
1350 RIDDER PARK DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondence name and address
HUGH H. MATSUBAYASHI
MACPHERSON, KWOK CHEN & HEID LLP
1762 TECHNOLOGY DRIVE
SUITE 26
SAN JOSE, CA 95110

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