Total properties:
214
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Patent #:
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Issue Dt:
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09/22/1992
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Application #:
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07662530
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Filing Dt:
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02/28/1991
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Title:
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INTEGRATED CRYSTAL OSCILLATOR WITH CIRCUIT FOR LIMITING CRYSTAL POWER DISSIPATION
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Patent #:
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Issue Dt:
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02/14/1995
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Application #:
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07689358
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Filing Dt:
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04/22/1991
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Title:
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INTEGRATED CIRCUIT CHIP CORE LOGIC SYSTEM CONTROLLER WITH POWER SAVING FEATURES FOR A MICROCOMPUTER SYSTEM
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Patent #:
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Issue Dt:
|
03/23/1993
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Application #:
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07779701
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Filing Dt:
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10/21/1991
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Title:
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PACKAGING FOR POPULATED CIRCUIT BOARDS
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Patent #:
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Issue Dt:
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08/27/1996
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Application #:
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07795161
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Filing Dt:
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11/19/1991
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Title:
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PAGE MODE BUFFER CONTROLLER FOR TRANSFERRING NB BYTE PAGES BETWEEN A HOST AND BUFFER MEMORY WITHOUT INTERRUPTION EXCEPT FOR REFRESH
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Patent #:
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Issue Dt:
|
09/12/1995
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Application #:
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07830041
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Filing Dt:
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01/31/1992
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Title:
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INTELLIGENT HARDWARE FOR AUTOMATICALLY CONTROLLING BUFFER MEMORY STORAGE SPACE IN A DISK DRIVE
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Patent #:
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Issue Dt:
|
01/07/1997
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Application #:
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08145037
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Filing Dt:
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10/28/1993
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Title:
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METHOD AND STRUCTURE FOR LOCATING AND SKIPPING OVER SERVO BURSTS ON A MAGNETIC DISK
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Patent #:
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Issue Dt:
|
06/16/1998
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Application #:
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08153560
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Filing Dt:
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11/17/1993
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Title:
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INTELLIGENT HARDWARE FOR AUTOMATICALLY READING AND WRITING MULTIPLE SECTORS OF DATA BETWEEN A COMPUTER BUS AND A DISK DRIVE
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Patent #:
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Issue Dt:
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07/30/1996
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Application #:
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08220075
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Filing Dt:
|
03/30/1994
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Title:
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ADAPTER FOR COMPUTER INTERFACE
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Patent #:
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Issue Dt:
|
04/29/1997
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Application #:
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08269491
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Filing Dt:
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06/30/1994
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Title:
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SCB ARRAY EXTERNAL TO A HOST ADAPTER INTEGRATED CIRCUIT
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Patent #:
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Issue Dt:
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12/24/1996
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Application #:
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08300284
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Filing Dt:
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09/02/1994
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Title:
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TIME DOMAIN SIGNAL FILTER
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Patent #:
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|
Issue Dt:
|
03/10/1998
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Application #:
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08301463
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Filing Dt:
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09/07/1994
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Title:
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METHOD AND APPARATUS FOR AUTOMATICALLY LOADING CONFIGURATION DATA ON RESET INTO A HOST ADAPTER INTEGRATED CIRCUIT
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|
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Patent #:
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Issue Dt:
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03/17/1998
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Application #:
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08301510
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Filing Dt:
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09/07/1994
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Title:
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SYNCHRONIZATION CIRCUIT FOR CLOCKED SIGNALS OF SIMILAR FREQUENCIES
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Patent #:
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Issue Dt:
|
02/03/1998
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Application #:
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08324298
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Filing Dt:
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10/17/1994
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Title:
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DISK SYSTEM WITH HEADERLESS TRACK FORMAT, EMBEDDED SERVO FIELDS AND CONSTANT DENSITY RECORDING
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Patent #:
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|
Issue Dt:
|
03/18/1997
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Application #:
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08454907
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Filing Dt:
|
05/31/1995
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Title:
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SERVO BURST CONTROLLER FOR A MAGNETIC DISK
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|
|
Patent #:
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|
Issue Dt:
|
11/04/1997
|
Application #:
|
08465031
|
Filing Dt:
|
06/05/1995
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Title:
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SYNCHRONIZATION CIRCUIT FOR CLOCKED SIGNALS OF SIMILAR FREQUENCIES
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|
Patent #:
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|
Issue Dt:
|
09/01/1998
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Application #:
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08504921
|
Filing Dt:
|
07/20/1995
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Title:
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SYSTEM FOR TRANSFERRING 32-BIT DOUBLE WORD IDE DATA SEQUENTIALLY WITHOUT AN INTERVENING INSTRUCTION BY AUTOMATICALLY INCREMENTING I/O PORT ADDRESS AND TRANSLATING INCREMENTED ADDRESS
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Patent #:
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|
Issue Dt:
|
09/22/1998
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Application #:
|
08522037
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Filing Dt:
|
09/01/1995
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Title:
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PROGRAMMABLE DATA TRANSFER WITHOUT SECTOR PULSES IN A HEADERLESS DISK DRIVE ARCHITECTURE
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Patent #:
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|
Issue Dt:
|
09/01/1998
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Application #:
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08522639
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Filing Dt:
|
09/01/1995
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Title:
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HARDWARE ALIGNMENT IN A HEADERLESS DISK DRIVE ARCHITECTURE
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Patent #:
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|
Issue Dt:
|
09/22/1998
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Application #:
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08522687
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Filing Dt:
|
09/01/1995
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Title:
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LOGICAL AND PHYSICAL ZONES FOR MANAGEMENT OF DEFECTS IN A HEADERLESS DISK DRIVE ARCHITECTURE
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Patent #:
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|
Issue Dt:
|
06/23/1998
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Application #:
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08542198
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Filing Dt:
|
10/12/1995
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Title:
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SYSTEM AND METHOD FOR SOLVING QUADRATIC EQUATION IN GALOIS FIELDS
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|
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Patent #:
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|
Issue Dt:
|
09/22/1998
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Application #:
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08542262
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Filing Dt:
|
10/12/1995
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Title:
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ARITHMETIC LOGIC UNIT AND METHOD FOR NUMERICAL COMPUTATIONS IN GALOIS FIELDS
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Patent #:
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|
Issue Dt:
|
07/28/1998
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Application #:
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08542277
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Filing Dt:
|
10/12/1995
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Title:
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SYSTEM AND METHOD FOR ENCODING AND DECODING DATA USING NUMERICAL COMPUTATIONS IN GALOIS FIELDS
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Patent #:
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|
Issue Dt:
|
06/22/1999
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Application #:
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08574534
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Filing Dt:
|
12/19/1995
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Title:
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USE OF A STORED SIGNAL TO SWITCH BETWEEN MEMORY BANKS
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|
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Patent #:
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|
Issue Dt:
|
07/20/1999
|
Application #:
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08603531
|
Filing Dt:
|
02/21/1996
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Title:
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REMOTE PROCEDURAL CALL COMPONENT MANAGEMENT METHOD FOR A HETEROGENEOUS COMPUTER NETWORK
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Patent #:
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|
Issue Dt:
|
08/04/1998
|
Application #:
|
08617994
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Filing Dt:
|
03/15/1996
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Title:
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DIGITAL DELAY CIRCUIT AND METHOD
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|
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Patent #:
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|
Issue Dt:
|
09/21/1999
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Application #:
|
08620266
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Filing Dt:
|
03/22/1996
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Title:
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METHOD AND APPARATUS FOR GENERATING ADDRESSES
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|
|
Patent #:
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|
Issue Dt:
|
05/06/1997
|
Application #:
|
08636296
|
Filing Dt:
|
04/23/1996
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Title:
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HARD DISK FORMAT USING FRAMES OF SECTORS TO OPTIMIZE
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|
|
Patent #:
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|
Issue Dt:
|
01/21/1997
|
Application #:
|
08639257
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Filing Dt:
|
04/23/1996
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Title:
|
SEQUENCER MAP FOR A HARD DISK CONTROLLER COMBINING DATA AND NEXT-ADDRESS FIELDS
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|
|
Patent #:
|
|
Issue Dt:
|
12/29/1998
|
Application #:
|
08666076
|
Filing Dt:
|
06/19/1996
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Title:
|
SYSTEM AND METHOD FOR CO-PLANAR AND NEARLY CO-PLANAR PRINTED CIRCUIT BOARD EXTENSION DOCKING SYSTEM
|
|
|
Patent #:
|
|
Issue Dt:
|
10/13/1998
|
Application #:
|
08709501
|
Filing Dt:
|
09/06/1996
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Title:
|
METHOD FOR DETERMINING WHETHER BI-DIRECTIONAL OR UNIDIRECTIONAL DATA LINE CIRCUITS ARE USED
|
|
|
Patent #:
|
|
Issue Dt:
|
08/11/1998
|
Application #:
|
08766892
|
Filing Dt:
|
12/13/1996
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Title:
|
DUAL EDGE D FLIP FLOP
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|
|
Patent #:
|
|
Issue Dt:
|
07/06/1999
|
Application #:
|
08773386
|
Filing Dt:
|
12/26/1996
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Title:
|
INTEGRATED CIRCUIT TEST STIMULUS VERIFICATION AND VECTOR EXTRACTION SYSTEM
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|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08808099
|
Filing Dt:
|
02/28/1997
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Title:
|
FORMAT CALCULATOR FOR HEADERLESS HARD DISK WITH EMBEDDED SERVO WEDGES
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|
|
Patent #:
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|
Issue Dt:
|
12/21/1999
|
Application #:
|
08815645
|
Filing Dt:
|
03/13/1997
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Title:
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METHOD OF MANAGING HARDWARE CONTROL BLOCKS UTILIZING ENDLESS QUEUE MAINTAINED TO NEVER BE EMPTY AND CONTAINING TAIL POINTER ONLY ACCESSIBLE BY PROCESS EXECUTING ON SYSTEM PROCESSOR
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|
|
Patent #:
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|
Issue Dt:
|
08/17/1999
|
Application #:
|
08816980
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Filing Dt:
|
03/13/1997
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Title:
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IMPROVED HARDWARE COMMAND BLOCK DELIVERY QUEUE FOR HOST ADAPTERS AND OTHER DEVICES WITH ONBOARD PROCESSORS
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|
|
Patent #:
|
|
Issue Dt:
|
03/28/2000
|
Application #:
|
08821783
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Filing Dt:
|
03/21/1997
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Title:
|
ENHANCED DUAL PORT I/O BUS BRIDGE
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|
|
Patent #:
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|
Issue Dt:
|
08/17/1999
|
Application #:
|
08823779
|
Filing Dt:
|
03/24/1997
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Title:
|
DATA SECTOR MARK GENERATION FOR A HEADERLESS DISK DRIVE ARCHITECTURE
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|
|
Patent #:
|
|
Issue Dt:
|
03/30/1999
|
Application #:
|
08823958
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Filing Dt:
|
03/25/1997
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Title:
|
BUS TO BUS BRIDGE DEADLOCK PREVENTION SYSTEM
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|
|
Patent #:
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|
Issue Dt:
|
06/02/1998
|
Application #:
|
08824202
|
Filing Dt:
|
03/25/1997
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Title:
|
METHOD AND APPARATUS FOR I/O MULTIPLEXING OF RAM BUS
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|
|
Patent #:
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|
Issue Dt:
|
07/27/1999
|
Application #:
|
08824203
|
Filing Dt:
|
03/25/1997
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Title:
|
DUAL-PURPOSE I/O CIRCUIT IN A COMBINED LINK/PHY INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
11/03/1998
|
Application #:
|
08829051
|
Filing Dt:
|
03/31/1997
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Title:
|
INTEGRATED CIRCUIT DESIGN FOR SINGLE ENDED RECEIVER MARGIN TRACKING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/1999
|
Application #:
|
08829316
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Filing Dt:
|
03/27/1997
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Title:
|
DESIGN VERIFICATION SYSTEM USING EXPECT BUFFERS
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|
|
Patent #:
|
|
Issue Dt:
|
02/09/1999
|
Application #:
|
08829463
|
Filing Dt:
|
03/28/1997
|
Title:
|
REDUCED-QUALITY RESOLUTION DIGTIAL VIDEO ENCODER/DECODER
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/1999
|
Application #:
|
08846355
|
Filing Dt:
|
04/30/1997
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Title:
|
METHOD AND APPARATUS FOR NETWORK INTERFACE FETCHING INITIAL AND DATA BURST BLOCKS AND SEGMENTING BLOCKS AND SCHEDULING BLOCKS COMPATIBLE FOR TRANSMISSION OVER MULTIPLE VIRTUAL CIRCUITS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/17/1999
|
Application #:
|
08846706
|
Filing Dt:
|
04/30/1997
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Title:
|
METHODS AND APPARATUSES FOR SCHEDULING ATM CELLS
|
|
|
Patent #:
|
|
Issue Dt:
|
08/01/2000
|
Application #:
|
08846707
|
Filing Dt:
|
04/30/1997
|
Title:
|
PROGRAMMABLE REASSEMBLY OF DATA RECEIVED IN AN ATM NETWORK
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2000
|
Application #:
|
08862143
|
Filing Dt:
|
05/22/1997
|
Title:
|
IMPROVED HARDWARE CONTROL BLOCK DELIVERY QUEUES FOR HOST ADAPTERS AND OTHER DEVICES WITH ONBOARD PROCESSORS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/28/1999
|
Application #:
|
08869665
|
Filing Dt:
|
06/05/1997
|
Title:
|
HOST ADAPTER INTEGRATED CIRCUIT HAVING AUTOACCESS PAUSE
|
|
|
Patent #:
|
|
Issue Dt:
|
12/07/1999
|
Application #:
|
08877115
|
Filing Dt:
|
06/17/1997
|
Title:
|
SYSTEM FOR ALIGNING CONTROL WORDS FOR IDENTIFYING BOUNDARIES OF HEADERLESS DATA SECTORS USING AUTOMATIC INCREMENTING AND DISCARDING OF DATA FRAME NUMBERS
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/1999
|
Application #:
|
08882198
|
Filing Dt:
|
06/25/1997
|
Title:
|
HOT-SWITCHABLE SCSI CONTROLLER HAVING OUTPUT DRIVERS WITH QUICK TURN-ON
|
|
|
Patent #:
|
|
Issue Dt:
|
03/23/1999
|
Application #:
|
08882199
|
Filing Dt:
|
06/25/1997
|
Title:
|
SCSI CONTROLLER HAVING OUTPUT DRIVER WITH SLEW RATE CONTROL
|
|
|
Patent #:
|
|
Issue Dt:
|
10/27/1998
|
Application #:
|
08884863
|
Filing Dt:
|
06/30/1997
|
Title:
|
METHOD AND APPARATUS FOR CONTROLLING CLOCK SKEW IN AN INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
07/13/1999
|
Application #:
|
08903803
|
Filing Dt:
|
07/31/1997
|
Title:
|
OBJECT ORIENTED SIMULATION MODELING
|
|
|
Patent #:
|
|
Issue Dt:
|
08/31/1999
|
Application #:
|
08920524
|
Filing Dt:
|
08/29/1997
|
Title:
|
HIGH SPEED PHASE LOCK LOOP HAVING HIGH PRECISION CHARGE PUMP WITH ERROR CANCELLATION
|
|
|
Patent #:
|
|
Issue Dt:
|
08/03/1999
|
Application #:
|
08924009
|
Filing Dt:
|
08/29/1997
|
Title:
|
HIGH SPEED PHASE LOCK LOOP HAVING CONSTANT BANDWIDTH
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
08924028
|
Filing Dt:
|
08/29/1997
|
Title:
|
GHZ TRANSCEIVER PHASE LOCK LOOP HAVING AUTOFREQUENCY LOCK CORRECTION
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
08928984
|
Filing Dt:
|
09/12/1997
|
Title:
|
MULTIPLE CLIENT MEMORY ARBITRATION SYSTEM CAPABLE OF OPERATING MULTIPLE CONFIGURATION TYPES
|
|
|
Patent #:
|
|
Issue Dt:
|
03/21/2000
|
Application #:
|
08933568
|
Filing Dt:
|
09/19/1997
|
Title:
|
METHOD AND APPARATUS FOR PERFORMING ERROR CORRECTION CODE OPERATIONS
|
|
|
Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
08944336
|
Filing Dt:
|
10/06/1997
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Title:
|
LOW VOLTAGE DIFFERENTIAL DRIVER WITH MULTIPLE DRIVE STRENGTHS
|
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2000
|
Application #:
|
08944903
|
Filing Dt:
|
10/06/1997
|
Title:
|
LOW VOLTAGE DIFFERENTIAL DUAL RECEIVER
|
|
|
Patent #:
|
|
Issue Dt:
|
09/26/2000
|
Application #:
|
08951987
|
Filing Dt:
|
10/16/1997
|
Title:
|
HIGH SPEED BOUNDARY SCAN DESIGN
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/1999
|
Application #:
|
08956224
|
Filing Dt:
|
10/21/1997
|
Title:
|
METHOD AND APPARATUS FOR AUTOMATICALLY LOADING CONFIGURATION DATA ON RESET INTO A HOST ADAPTER INTEGRATED CIRCUIT
|
|
|
Patent #:
|
|
Issue Dt:
|
06/27/2000
|
Application #:
|
08963899
|
Filing Dt:
|
11/04/1997
|
Title:
|
Data Processing System And Virtual Partitioning Method For
Creating Logical Multi-Level Units Of Online Storage
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
08963905
|
Filing Dt:
|
11/04/1997
|
Title:
|
MECHANISM FOR INCREMENTAL BACKUP OF ON-LINE FILES
|
|
|
Patent #:
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|
Issue Dt:
|
02/29/2000
|
Application #:
|
08964356
|
Filing Dt:
|
11/04/1997
|
Title:
|
METHOD FOR RECONFIGURING CONTAINERS WITHOUT SHUTTING DOWN THE SYSTEM AND WITH MINIMAL INTERRUPTION TO ON-LINE PROCESSING
|
|
|
Patent #:
|
|
Issue Dt:
|
05/16/2000
|
Application #:
|
08965718
|
Filing Dt:
|
11/07/1997
|
Title:
|
FAULT TO TOLERANT MULTIPLE CLIENT MEMORY ARBITRATION SYSTEM CAPABLE OF OPERATING MULTIPLE CONFIGURATION TYPES
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|
|
Patent #:
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|
Issue Dt:
|
05/29/2001
|
Application #:
|
09001245
|
Filing Dt:
|
12/30/1997
|
Title:
|
A TIMER BASED ARBITRATIONS SCHEME FOR A PCI MULTI-FUNCTION DEVICE
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|
|
Patent #:
|
|
Issue Dt:
|
09/07/1999
|
Application #:
|
09001615
|
Filing Dt:
|
12/31/1997
|
Title:
|
METHOD AND SYSTEM FOR CHANGING PERIPHERAL COMPONENT INTERCONNECT CONFIGURATION REGISTERS
|
|
|
Patent #:
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|
Issue Dt:
|
08/08/2000
|
Application #:
|
09005792
|
Filing Dt:
|
01/12/1998
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Title:
|
METHODS AND APPARATUS FOR COMMUNICATING BETWEEN NETWORKED PERIPHERAL DEVICES
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|
|
Patent #:
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|
Issue Dt:
|
12/04/2001
|
Application #:
|
09005799
|
Filing Dt:
|
01/12/1998
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Title:
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METHOD AND APPARATUS FOR SHARING PERIPHERAL DEVICES OVER A NETWORK
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|
Patent #:
|
|
Issue Dt:
|
08/15/2000
|
Application #:
|
09013498
|
Filing Dt:
|
01/26/1998
|
Title:
|
METHOD AND APPARATUS FOR ALLOCATING EXCLUSIVE SHARED RESOURCE REQUESTS IN A COMPUTER SYSTEM
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|
Patent #:
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|
Issue Dt:
|
09/24/2002
|
Application #:
|
09015727
|
Filing Dt:
|
01/29/1998
|
Title:
|
ERROR CORRECTION METHOD
|
|
|
Patent #:
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|
Issue Dt:
|
08/17/1999
|
Application #:
|
09023395
|
Filing Dt:
|
02/13/1998
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Title:
|
INTENTIONALLY MISMATCHED MIRROR PROCESS INVERSE CURRENT SOURCE
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|
Patent #:
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|
Issue Dt:
|
12/02/2003
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Application #:
|
09032364
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Filing Dt:
|
02/27/1998
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Title:
|
SYSTEM FOR SHARING PERIPHERAL DEVICES OVER A NETWORK AND METHOD FOR IMPLEMENTING THE SAME
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|
Patent #:
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|
Issue Dt:
|
07/18/2000
|
Application #:
|
09046117
|
Filing Dt:
|
03/20/1998
|
Title:
|
PIPELINED BERLEKAMP-MASSEY ERROR LOCATOR POLYNOMIAL GENERATING APPARATUS AND METHOD
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|
|
Patent #:
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Issue Dt:
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04/25/2000
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Application #:
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09049365
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Filing Dt:
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03/27/1998
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Title:
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AN INTEGRATED CIRCUIT SCSI I/O CELL HAVING SIGNAL ASSERTION EDGE TRIGGERED TIMED GLITCH FILTER THAT DEFINES A STROBE MASKING PERIOD TO PROTECT THE CONTENTS OF DATA LATCHES
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Patent #:
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Issue Dt:
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09/05/2000
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Application #:
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09049375
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Filing Dt:
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03/27/1998
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Title:
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LOW CAPACITANCE ESD SEMICONDUCTOR STRUCTURE HAVING A SOURCE INSIDE A WELL AND THE BOTTOM PORTION OF THE DRAIN INSIDE A SUBSTRATE
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09055105
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Filing Dt:
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04/03/1998
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Title:
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INTEGRATED CIRCUIT SCSI INPUT RECEIVER HAVING PRECISION HIGH SPEED INPUT BUFFER WITH HYSTERESIS
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Patent #:
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Issue Dt:
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05/15/2001
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Application #:
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09062155
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Filing Dt:
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04/16/1998
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Title:
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METHODS AND APPARATUS FOR PROVIDING REDUCED BIT RATE DIGITAL VIDEO FORMATS
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Patent #:
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Issue Dt:
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11/28/2000
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Application #:
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09062278
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Filing Dt:
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04/17/1998
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Title:
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REDUNDANT BUS BRIDGE SYSTEMS AND METHODS USING SEPARATELY-POWERED BUS BRIDGES
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Patent #:
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Issue Dt:
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08/08/2000
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Application #:
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09063635
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Filing Dt:
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04/20/1998
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Title:
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ARITHMETIC LOGIC UNIT AND METHOD FOR NUMERICAL COMPUTATIONS IN GALOIS FIELDS
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Patent #:
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Issue Dt:
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05/16/2000
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Application #:
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09072916
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Filing Dt:
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05/04/1998
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Title:
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MULTIPLE FREQUENCY CLOCK GENERATION AND SYNCHRONIZATION
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Patent #:
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Issue Dt:
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12/19/2000
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Application #:
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09087433
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Filing Dt:
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05/29/1998
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Title:
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RAM BASED ERROR CORRECTION CODE ENCODER AND SYNDROME GENERATOR WITH PROGRAMMABLE INTERLEAVING DEGREES
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Patent #:
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Issue Dt:
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02/20/2001
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Application #:
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09087731
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Filing Dt:
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05/29/1998
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Title:
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DEVICE AND METHOD FOR EXTENDING ERROR CORRECTION BEYOND ONE SECTOR TIME
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Patent #:
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Issue Dt:
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06/26/2001
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Application #:
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09088810
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Filing Dt:
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06/02/1998
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Title:
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EXECUTION SUSPENSION AND RESUMPTION IN MULTI-TASKING HOST ADAPTERS
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Patent #:
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Issue Dt:
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06/05/2001
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Application #:
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09089013
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Filing Dt:
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06/02/1998
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Title:
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SYSTEM FOR REGISTER PARTITIONING IN MULTI-TASKING HOST ADAPTERS BY ASSIGNING A REGISTER SET AND A UNIQUE INDENTIFIER IN EACH OF A PLURALITY OF HARDWARE MODULES
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Patent #:
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Issue Dt:
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12/14/1999
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Application #:
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09089054
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Filing Dt:
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06/02/1998
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Title:
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TIMER USING A SINGLE COUNTER TO TRACK MULTIPLE TIME-OUTS
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Patent #:
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Issue Dt:
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07/04/2000
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Application #:
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09089068
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Filing Dt:
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06/02/1998
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Title:
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COMMUNICATIONS INTERFACE ADAPTER FOR A COMPUTER SYSTEM INCLUDING POSTING OF SYSTEM INTERRUPT STATUS
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Patent #:
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Issue Dt:
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10/30/2001
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Application #:
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09089278
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Filing Dt:
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06/02/1998
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Title:
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MONITOR PORT WITH SELECTABLE TRACE SUPPORT
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Patent #:
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Issue Dt:
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07/03/2001
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Application #:
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09095908
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Filing Dt:
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06/11/1998
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Title:
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BUS SYSTEM EXPANDABLE BY CONNECTION OF A BUS BRIDGE CIRCUIT
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Patent #:
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Issue Dt:
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11/05/2002
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Application #:
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09096033
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Filing Dt:
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06/11/1998
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Title:
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STACKED I/O BRIDGE CIRCUIT ASSEMBLIES HAVING FLEXIBLY CONFIGURABLE CONNECTIONS
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09096096
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Filing Dt:
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06/11/1998
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Title:
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MODULAR BUS BRIDGE SYSTEM COMPATIBLE WITH MULTIPLE BUS PIN CONFIGURATIONS
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Patent #:
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Issue Dt:
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08/29/2000
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Application #:
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09096300
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Filing Dt:
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06/02/1998
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Title:
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A NON-INVASIVE BUS MASTER BACK-OFF CIRCUIT AND METHOD FOR SYSTEMS HAVING A PLURALITY OF BUS MASTERS
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09099666
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Filing Dt:
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06/18/1998
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Title:
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HIGH SPEED GAIN STAGE WITH DC OFFSET CANCELLATION FOR SERVO DEMODULATOR CIRCUIT
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Patent #:
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Issue Dt:
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06/25/2002
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Application #:
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09107240
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Filing Dt:
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06/30/1998
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Title:
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A SCAN CELL INCLUDING A PROPAGATION DELAY AND ISOLATION ELEMENT
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Patent #:
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Issue Dt:
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03/20/2001
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Application #:
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09110783
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Filing Dt:
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07/06/1998
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Title:
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INTELLIGENT BACKUP AND RESTORING SYSTEM AND METHOD FOR IMPLEMENTING THE SAME
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Patent #:
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Issue Dt:
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09/26/2000
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Application #:
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09113729
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Filing Dt:
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07/10/1998
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Title:
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BIAS COMPENSATOR FOR DIFFERENTIAL TRANSMISSION LINE WITH VOLTAGE BIAS
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Patent #:
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Issue Dt:
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06/20/2000
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Application #:
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09116434
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Filing Dt:
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07/15/1998
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Title:
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ELECTROSTATIC DISCHARGE PROTECTION BUS/DIE EDGE SEAL
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Patent #:
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Issue Dt:
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08/01/2000
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Application #:
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09119716
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Filing Dt:
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07/20/1998
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Title:
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ONE-PIECE MULTIPLE-COMPARTMENT SHIPPING AND DISPLAY BOX
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Patent #:
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Issue Dt:
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08/27/2002
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Application #:
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09127647
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Filing Dt:
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07/31/1998
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Title:
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DATA COMMUNICATIONS SYSTEM
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