Patent Assignment Details
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| Reel/Frame: | 032408/0896 | |
| Pages: | 3 |
| | Recorded: | 03/11/2014 | | |
| Attorney Dkt #: | PM98019C1 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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02/01/2005
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Application #:
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09779123
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Filing Dt:
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02/07/2001
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Publication #:
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Pub Dt:
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08/08/2002
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Title:
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PLANARIZED SEMICONDUCTOR INTERCONNECT TOPOGRAPHY AND METHOD FOR POLISHING A METAL LAYER TO FORM INTERCONNECT
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Assignee
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| 3939 NORTH FIRST STREET |
| SAN JOSE, CALIFORNIA 95134 |
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Correspondence name and address
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CYPRESS SEMICONDUCTOR CORPORATION
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198 CHAMPION COURT
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SAN JOSE, CA 95134-1709
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