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Reel/Frame:060928/0898   Pages: 2
Recorded: 08/29/2022
Attorney Dkt #:82314862US02
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
NONE
Issue Dt:
Application #:
17822951
Filing Dt:
08/29/2022
Publication #:
Pub Dt:
12/28/2023
Title:
INTERFACE CIRCUIT AND METHOD FOR PROVIDING DC BIAS VOLTAGE CORRECTION
Assignor
1
Exec Dt:
07/28/2022
Assignee
1
HIGH TECH CAMPUS
EINDHOVEN, NETHERLANDS 5656AG
Correspondence name and address
NXP SEMICONDUCTORS
350 HOLGER WAY
SAN JOSE, CA 95134

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