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Patent #:
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11/15/1994
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08023276
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02/26/1993
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Title:
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09/27/1994
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08024655
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03/01/1993
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Title:
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06/07/1994
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08024795
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03/01/1993
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Title:
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04/26/1994
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08024878
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Filing Dt:
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03/01/1993
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Title:
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12/28/1993
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08025197
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03/02/1993
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Title:
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10/28/1997
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08025304
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Filing Dt:
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03/02/1993
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Title:
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08/19/1997
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08025605
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03/03/1993
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Title:
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12/23/1997
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08026624
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03/04/1993
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Title:
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Issue Dt:
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11/28/1995
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08026625
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03/04/1993
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09/27/1994
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08027031
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03/05/1993
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Title:
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LOSSLESS ACTIVE SNUBBER FOR HALF-BRIDGE OUTPUT RECTIFIERS
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11/28/1995
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08027217
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03/05/1993
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Title:
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05/31/1994
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08029936
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03/11/1993
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Title:
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10/18/1994
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08031752
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03/15/1993
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Title:
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REMOTE MONITORING OF HIGH-RISK PATIENTS USING ARTIFICIAL INTELLIGENCE
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01/04/1994
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08032814
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03/15/1993
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Title:
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METHOD AND APPARATUS FOR CONTROLLING A PROCESSOR BUS USED BY MULTIPLE PROCESSOR COMPONENTS DURING WRITEBACK CACHE TRANSACTIONS
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09/06/1994
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08034178
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03/19/1993
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05/31/1994
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08034581
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03/22/1993
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Title:
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07/12/1994
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08034995
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03/22/1993
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Title:
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04/12/1994
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08037714
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03/25/1993
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Title:
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05/31/1994
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08039503
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03/29/1993
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Title:
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SYSTEM AND METHOD FOR AUTOMATICALLY RELOCATING AND CONFIGURING FIRMWARE STORED IN SUBSYSTEM MODULES
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02/15/1994
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08041129
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03/31/1993
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Title:
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DIGITAL PROCESSING SYSTEM INCLUDING PLURAL MEMORY DEVICES AND DATA TRANSFER CIRCUITRY
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11/30/1993
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08042859
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04/05/1993
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Title:
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DATA BASE ACCESS MECHANISM FOR RULES UTILIZED BY A SYNTHESIS PROCEDURE FOR LOGIC CIRCUIT DESIGN
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06/07/1994
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08043290
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04/06/1993
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Title:
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CARD CAGE SYSTEM
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12/23/1997
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08047271
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04/14/1993
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Title:
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DISTRIBUTED MULT-VERSION COMMITMENT ORDERING PROTOCOLS FOR GUARANTEEING SERIALIZABILITY DURING TRANSACTION PROCESSING
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11/29/1994
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08049019
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04/16/1993
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Title:
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METHOD AND APPARATUS FOR CLOCK SKEW REDUCTION THROUGH REMOTE DELAY REGULATION
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10/17/1995
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08050929
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04/21/1993
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Title:
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SYSTEM TO FACILITATE EFFICIENT UTILIZATION OF NETWORK RESOURCES IN A COMPUTER NETWORK
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06/28/1994
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08051483
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04/22/1993
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Title:
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DISTRIBUTED COMPUTATION RECOVERY MANAGEMENT SYSTEM AND METHOD
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12/06/1994
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08051523
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04/22/1993
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Title:
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JOURNALLING OPTIMIZATION SYSTEM AND METHOD FOR DISTRIBUTED COMPUTATIONS
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05/31/1994
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08052496
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04/22/1993
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Title:
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OSCILLATION DEVICE FOR PLATING SYSTEM
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05/24/1994
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08054458
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04/28/1993
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Title:
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CONFORMAL HEAT SINK FOR ELECTRONIC MODULE
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11/01/1994
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08055000
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04/29/1993
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PROGRAMMABLE PIXEL AND SCAN-LINE OFFSETS FOR A HARDWARE CURSOR
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05/03/1994
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08056100
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04/30/1993
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METHOD AND APPARATUS FOR CLOCK SKEW REDUCTION THROUGH ABSOLUTE DELAY REGULATION
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01/17/1995
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08056552
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05/03/1993
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I/O EXPANSION BOX
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03/29/1994
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08058076
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05/04/1993
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METHOD AND APPARATUS FOR LIQUID SPILL CONTAINMENT
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02/08/1994
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08061273
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05/13/1993
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Title:
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INTEGRATED CIRCUIT CHIP HAVING PRIMARY AND SECONDARY RANDOM ACCESS MEMORIES FOR A HIERARCHICAL CACHE
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02/14/1995
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08061754
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05/13/1993
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Title:
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TRANSACTION CONTROL
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02/11/1997
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08065956
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05/21/1993
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Title:
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INPUT MODIFICATION SYSTEM FOR MULTILEVEL DITHERING
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03/22/1994
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08066597
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05/24/1993
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Title:
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CACHE COHERENCY PROTOCOL FOR MULTI PROCESSOR COMPUTER SYSTEM
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06/20/1995
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08067368
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05/26/1993
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Title:
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METHOD AND APPARATUS FOR PROCESSING INPUT/OUTPUT COMMANDS IN A STORAGE SYSTEM HAVING A COMMAND QUEUE
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04/03/2001
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08068592
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05/27/1993
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METHOD AND APPARATUS FOR SYNCHRONIZING UPGRADES IN DISTRIBUTED NETWORK DATA PROCESSING SYSTEMS
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05/30/1995
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08069923
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05/28/1993
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Title:
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PROCESS FOR FILLING AN ISOLATION TRENCH
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04/19/1994
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08072342
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06/03/1993
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Title:
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MECHANISM FOR BROADCASTING DATA IN A MASSIVELY PARALLEL ARRAY PROCESSING SYSTEM
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11/28/2000
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08072632
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06/03/1993
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METHOD AND APPARATUS FOR EMPLOYING A CYCLE BIT TO INDICATE COMPLETION OF PARALLEL EXECUTING INSTRUCTIONS
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02/22/1994
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08073457
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06/07/1993
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BIPOLAR TRANSISTOR MEMORY CELL AND METHOD
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12/27/1994
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08074697
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06/08/1993
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METHOD AND SYSTEM FOR SORTING AND PRIORITIZING ELECTRONIC MAIL MESSAGES
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07/19/1994
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08077570
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06/15/1993
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METHOD OF CONTROLLING GATE OXIDE THICKNESS IN THE FABRICATION OF SEMICONDUCTOR DEVICES
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05/30/1995
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08079309
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06/17/1993
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04/11/1995
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08079477
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06/18/1993
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PROPAGATION SPEEDUP BY USE OF COMPLEMENTARY RESOLVER OUTPUTS IN A SYSTEM BUS RECEIVER
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05/30/1995
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08079494
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06/17/1993
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MECHANISM FOR ENFORCING THE CORRECT ORDER OF INSTRUCTION EXECUTION
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06/27/1995
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08079498
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06/17/1993
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A METHOD AND APPARATUS FOR PROPAGATING EXCEPTION CONDITIONS OF A COMPUTER SYSTEM
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10/25/1994
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08079516
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06/18/1993
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BUS TERMINATION RESISTANCE LINEARITY CIRCUIT
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04/18/1995
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08079701
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06/17/1993
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NAMING SERVICE DATABASE UPDATING TECHNIQUE
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11/01/1994
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08079723
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06/18/1993
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Title:
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COMPENSATED OFFSET VOLTAGE, LOW GAIN, HIGH BANDWIDTH, FULL SWING, WIDE COMMON MODE RANGE, CMOS DIFFERENTIAL VOLTAGE AMPLIFIER
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10/24/1995
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08080375
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06/18/1993
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BUS SETTLE TIME BY USING PREVIOUS BUS STATE TO CONDITION BUS AT ALL RECEIVING LOCATIONS
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07/09/1996
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08080467
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06/18/1993
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INTEGRATED I/O BUS CIRCUIT PROTECTION FOR MULTIPLE-DRIVEN SYSTEM BUS SIGNALS
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07/04/1995
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08081970
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06/24/1993
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REMOTE PROCEDURE CALLBACK SYSTEM AND METHOD
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10/31/1995
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08084292
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06/28/1993
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OBJECT ORIENTED COMPUTER ARCHITECTURE USING DIRECTORY OBJECTS
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07/05/1994
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08084763
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06/28/1993
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CHUNKY BINARY MULTIPLIER AND METHOD OF OPERATION
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04/18/1995
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08084890
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06/29/1993
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02/07/1995
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08085002
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06/29/1993
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THRESHOLD OPTIMIZATION FOR SOI TRANSISTORS THROUGH USE OF NEGATIVE CHARGE IN THE GATE OXIDE
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05/28/1996
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08085018
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06/29/1993
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METHOD AND APPARATUS FOR THE ON-LINE RESTORATION OF A DISK IN A RAID- 4 OR RAID-5 ARRAY WITH CONCURRENT ACCESS BY APPLICATIONS
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02/14/1995
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06/29/1993
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METHOD FOR ON-LINE REORGANIZATION OF THE DATA ON A RAID-4 OR RAID-5 ARRAY IN THE ABSENCE OF ONE DISK AND THE ON-LINE RESTORATION OF A REPLACEMENT DISK
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01/31/1995
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08085281
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06/29/1993
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PROCESS FOR INCREASING SACRIFICIAL OXIDE ETCH RATE TO REDUCE FIELD OXIDE LOSS
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04/18/1995
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08085321
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06/29/1993
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SOI TRANSISTOR THRESHOLD OPTIMIZATION BY USE OF GATE OXIDE HAVING POSITIVE CHARGE
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08/29/1995
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08085407
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06/30/1993
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FAULT TOLERANT DISTRIBUTED GARBAGE COLLECTION SYSTEM AND METHOD FOR COLLECTING NETWORK OBJECTS
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02/28/1995
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08085535
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06/30/1993
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08/29/1995
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08085558
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06/30/1993
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FIXTURE AND METHOD FOR ATTACHING COMPONENTS
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10/31/1995
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08085639
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06/30/1993
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HIGH CAPACITY NETLIST COMPARISON
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06/03/1997
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08085715
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06/30/1993
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DISK CACHE MANAGEMENT TECHNIQUES USING NON-VOLATILE STORAGE
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04/11/1995
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08085869
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06/30/1993
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MULTIPROCESSOR CACHE EXAMINER AND COHERENCY CHECKER
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06/13/2000
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08086354
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07/01/1993
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BRANCH PREDICTION IN HIGH-PERFORMANCE PROCESSOR
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Patent #:
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Issue Dt:
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02/28/1995
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Application #:
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08086355
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Filing Dt:
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07/01/1993
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Title:
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BRANCH PREDICTION UNIT FOR HIGH-PERFORMANCE PROCESSOR
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Patent #:
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Issue Dt:
|
04/09/1996
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Application #:
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08086441
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Filing Dt:
|
06/30/1993
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Title:
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METHOD AND SYSTEM FOR DATA RETRIEVAL IN A DISTRIBUTED SYSTEM USING LINKED LOCATION REFERENCES ON A PLURALITY OF NODES
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Patent #:
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Issue Dt:
|
08/27/1996
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Application #:
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08086453
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Filing Dt:
|
07/01/1993
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Title:
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SYSTEM FOR CONTROLLING A WRITE CACHE AND MERGING ADJACENT DATA BLOCKS FOR WRITE OPERATIONS
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Patent #:
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Issue Dt:
|
05/02/1995
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Application #:
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08086527
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Filing Dt:
|
07/01/1993
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Title:
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OPTICAL FORCE SENSOR FOR HIGH DENSITY PLANAR ELECTRICAL INTERCONNECTS
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Patent #:
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Issue Dt:
|
09/27/1994
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Application #:
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08086596
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Filing Dt:
|
07/01/1993
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Title:
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SECURE METHOD OF NEIGHBOR DISCOVERY OVER A MULTIACCESS MEDIUM
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|
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Patent #:
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|
Issue Dt:
|
10/18/1994
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Application #:
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08086598
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Filing Dt:
|
07/01/1993
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Title:
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METHOD OF FORMING MICRO-TRENCH ISOLATION REGIONS IN THE FABRICATION OF SEMICONDUCTOR DEVICES
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Patent #:
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Issue Dt:
|
01/09/1996
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Application #:
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08086746
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Filing Dt:
|
07/01/1993
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Title:
|
MESSAGE ENCRYPTION USING A HASH FUNCTION
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|
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Patent #:
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|
Issue Dt:
|
11/22/1994
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Application #:
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08086946
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Filing Dt:
|
07/02/1993
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Title:
|
SIGNATURE DATA OBJECT
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|
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Patent #:
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|
Issue Dt:
|
06/14/1994
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Application #:
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08087541
|
Filing Dt:
|
07/02/1993
|
|
Title:
|
COMBINED DIFFERENTIAL-MODE COMMON-MODE NOISE FILTER
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|
|
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Patent #:
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Issue Dt:
|
01/10/1995
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Application #:
|
08088004
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Filing Dt:
|
07/06/1993
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Title:
|
VOLTAGE-TRACKING CIRCUIT AND APPLICATION IN A TRACK-AND-HOLD AMPLIFIER
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|
|
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Patent #:
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|
Issue Dt:
|
02/21/1995
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Application #:
|
08088237
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Filing Dt:
|
07/06/1993
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|
Title:
|
DETERMINATION OF INTERCONNECT STRESS TEST CURRENT
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|
|
|
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Patent #:
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|
Issue Dt:
|
01/10/1995
|
Application #:
|
08088291
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Filing Dt:
|
07/06/1993
|
|
Title:
|
PEAK DETECTOR CIRCUIT AND APPLICATION IN A FIBER OPTIC RECEIVER
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|
|
|
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Patent #:
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|
Issue Dt:
|
05/09/1995
|
Application #:
|
08088480
|
Filing Dt:
|
07/07/1993
|
|
Title:
|
SEGMENTED VIDEO ON DEMAND SYSTEM
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|
|
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Patent #:
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|
Issue Dt:
|
08/15/1995
|
Application #:
|
08088504
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Filing Dt:
|
07/07/1993
|
|
Title:
|
VIDEO ON DEMAND WITH MEMORY ACCESSING AND VCR LIKE FUNCTIONS
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|
|
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Patent #:
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|
Issue Dt:
|
10/11/1994
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Application #:
|
08090359
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Filing Dt:
|
07/12/1993
|
|
Title:
|
STAGED CMOS OUTPUT BUFFER
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|
|
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|
Patent #:
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|
Issue Dt:
|
03/19/1996
|
Application #:
|
08090844
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Filing Dt:
|
07/12/1993
|
|
Title:
|
LANGUAGE SCOPING FOR MODULAR, FLEXIBLE, CONCISE, CONFIGURATION DESCRIPTIONS
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|
|
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Patent #:
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|
Issue Dt:
|
07/25/1995
|
Application #:
|
08092624
|
Filing Dt:
|
07/16/1993
|
|
Title:
|
ZERO IMPACT MODULE EJECTION SYSTEM
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/01/1998
|
Application #:
|
08094651
|
Filing Dt:
|
07/19/1993
|
|
Title:
|
METHOD FOR ADDRESSING PAGE TABLES IN VIRTUAL MEMORY
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/03/1995
|
Application #:
|
08097781
|
Filing Dt:
|
07/26/1993
|
|
Title:
|
VOLTAGE LEVEL CONVERTING BUFFER CIRCUIT
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|
|
|
|
Patent #:
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|
Issue Dt:
|
09/13/1994
|
Application #:
|
08098164
|
Filing Dt:
|
07/28/1993
|
|
Title:
|
PLANARIZATION PROCESS FOR IC TRENCH ISOLATION USING OXIDIZED POLYSILICON FILLER
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|
|
|
|
Patent #:
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|
Issue Dt:
|
07/21/1998
|
Application #:
|
08098501
|
Filing Dt:
|
07/28/1993
|
|
Title:
|
DEBUGGING A COMPUTER PROGRAM BY SIMULATING EXECUTION FORWARDS AND BACKWARDS IN A MAIN HISTORY LOG AND ALTERNATIVE HISTORY LOGS
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|
|
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|
Patent #:
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|
Issue Dt:
|
01/30/1996
|
Application #:
|
08098757
|
Filing Dt:
|
07/28/1993
|
|
Title:
|
COMPUTER SIMULATION TECHNIQUE FOR PREDICTING PROGRAM PERFORMANCE
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|
|
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Patent #:
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|
Issue Dt:
|
05/31/1994
|
Application #:
|
08099136
|
Filing Dt:
|
07/29/1993
|
|
Title:
|
METHOD OF DECREASING THE FIELD OXIDE ETCH RATE IN ISOLATION TECHNOLOGY
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|
|
|
|
Patent #:
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|
Issue Dt:
|
04/18/1995
|
Application #:
|
08100001
|
Filing Dt:
|
07/29/1993
|
|
Title:
|
METHOD AND APPARATUS FOR SCHEMATIC ROUTING
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/28/1995
|
Application #:
|
08100002
|
Filing Dt:
|
07/29/1993
|
|
Title:
|
METHOD AND APPARATUS FOR GENERATING TESTS FOR STRUCTURES EXPRESSED AS EXTENDED FINITE STATE MACHINES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/14/1994
|
Application #:
|
08101084
|
Filing Dt:
|
08/02/1993
|
|
Title:
|
POWER LINE TRANSIENT SUPPRESSION CIRCUIT APPLIANCES
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/28/1995
|
Application #:
|
08103509
|
Filing Dt:
|
08/06/1993
|
|
Title:
|
MOLDED BUMPER RAIL FOR A PORTABLE COMPUTER
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/29/1995
|
Application #:
|
08103510
|
Filing Dt:
|
08/06/1993
|
|
Title:
|
PC BOARD CARTRIDGE FOR A COMPUTER TERMINAL
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|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/23/1994
|
Application #:
|
08103722
|
Filing Dt:
|
08/06/1993
|
|
Title:
|
BROKER FOR COMPUTER NETWORK SERVER SELECTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/1994
|
Application #:
|
08103815
|
Filing Dt:
|
08/09/1993
|
|
Title:
|
REDUCING STALL DELAY IN PIPELINED COMPUTER SYSTEM USING QUEUE BETWEEN PIPELINE STAGES
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|
