|
Total properties:
59
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/08/2000
|
Application #:
|
08885310
|
Filing Dt:
|
06/30/1997
|
|
Title:
|
HOT CHIPS & SALSAS INC
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
08949122
|
Filing Dt:
|
10/10/1997
|
|
Title:
|
METHOD AND APPARATUS FOR MANIFOLD ARRAY PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/17/2001
|
Application #:
|
09169072
|
Filing Dt:
|
10/09/1998
|
|
Title:
|
MERGED ARRAY CONTROLLER AND PROCESSING ELEMENT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/29/2002
|
Application #:
|
09169255
|
Filing Dt:
|
10/09/1998
|
|
Title:
|
METHODS AND APPARATUS FOR DYNAMIC INSTRUCTION CONTROLLED RECONFIGURATION REGISTER FILE WITH EXTENDED PRECISION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/26/2000
|
Application #:
|
09169256
|
Filing Dt:
|
10/09/1998
|
|
Title:
|
METHODS AND APPARATUS FOR MANARRAY PE-PE SWITCH CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/21/2000
|
Application #:
|
09187539
|
Filing Dt:
|
11/06/1998
|
|
Title:
|
METHODS AND APPARATUS FOR EFFICIENT SYNCHRONOUS MIMD OPERATIONS WITH IVLIW PE-TO-PE COMMUNICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2001
|
Application #:
|
09205588
|
Filing Dt:
|
12/04/1998
|
|
Title:
|
METHODS AND APPARATUS FOR DYNAMIC VERY LONG INSTRUCTION WORD SUB-INSTRUCTION SELECTION FOR EXECUTION TIME PARALLELISM IN AN INDIRECT VERY LONG INSTRUCTION WORD PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/08/2000
|
Application #:
|
09215081
|
Filing Dt:
|
12/18/1998
|
|
Title:
|
METHODS AND APPARTUS FOR SCALABLE INSTRUCTION SET ARCHITECTURE WITH DYNAMIC COMPACT INSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/10/2001
|
Application #:
|
09228374
|
Filing Dt:
|
01/12/1999
|
|
Title:
|
METHODS AND APPARATUS TO DYNAMICALLY RECONFIGURE THE INSTRUCTION PIPELINE OF AN INDIRECT VERY LONG INSTRUCTION WORD SCALABLE PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09238446
|
Filing Dt:
|
01/28/1999
|
|
Title:
|
METHODS AND APPARATUS TO SUPPORT CONDITIONAL EXECUTION IN A VLIW-BASED ARRAY PROCESSOR WITH SUBWORD EXECUTION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09267570
|
Filing Dt:
|
03/12/1999
|
|
Title:
|
REGISTER FILE INDEXING METHODS AND APPARATUS FOR PROVIDING INDIRECT CONTROL OF REGISTER ADDRESSING IN A VLIW PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/08/2002
|
Application #:
|
09323609
|
Filing Dt:
|
06/01/1999
|
|
Title:
|
MANIFOLD ARRAY PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/04/2005
|
Application #:
|
09337839
|
Filing Dt:
|
06/22/1999
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
EFFICIENT COMPLEX MULTIPLICATION AND FAST FOURIER TRANSFORM (FFT) IMPLEMENTATION ON THE MANARRAY ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/12/2002
|
Application #:
|
09350191
|
Filing Dt:
|
07/09/1999
|
|
Title:
|
METHODS AND APPARATUS FOR INSTRUCTION ADDRESSING IN INDIRECT VLIW PROCESSORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/18/2002
|
Application #:
|
09422015
|
Filing Dt:
|
10/21/1999
|
|
Title:
|
METHODS AND APPARATUS FOR ABBREVIATED INSTRUCTION SETS ADAPTABLE TO CONFIGURABLE PROCESSOR ARCHITECTURES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/24/2004
|
Application #:
|
09432705
|
Filing Dt:
|
11/02/1999
|
|
Title:
|
METHODS AND APPARATUS FOR IMPROVED MOTION ESTIMATION FOR VIDEO ENCODING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/10/2001
|
Application #:
|
09471217
|
Filing Dt:
|
12/23/1999
|
|
Title:
|
METHODS AND APPARATUS FOR PROVIDING DATA TRANSFER CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/03/2001
|
Application #:
|
09472372
|
Filing Dt:
|
12/23/1999
|
|
Title:
|
METHODS AND APPARATUS FOR PROVIDING DIRECT MEMORY ACCESS CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/20/2001
|
Application #:
|
09543473
|
Filing Dt:
|
04/05/2000
|
|
Title:
|
Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/28/2002
|
Application #:
|
09596103
|
Filing Dt:
|
06/16/2000
|
|
Title:
|
ACCESSING TABLES IN MEMORY BANKS USING LOAD AND STORE ADDRESS GENERATORS SHARING STORE READ PORT OF COMPUTE REGISTER FILE SEPARATED FROM ADDRESS REGISTER FILE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/25/2003
|
Application #:
|
09598084
|
Filing Dt:
|
06/21/2000
|
|
Title:
|
METHODS AND APPARATUS FOR ESTABLISHING PORT PRIORITY FUNCTIONS IN A VLIW PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/15/2005
|
Application #:
|
09598558
|
Filing Dt:
|
06/21/2000
|
|
Title:
|
METHOD AND APPARATUS FOR PROVIDING MANIFOLD ARRAY (MANARRAY) PROGRAM CONTEXT SWITCH WITH ARRAY RECONFIGURABLE CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/16/2003
|
Application #:
|
09598564
|
Filing Dt:
|
06/21/2000
|
|
Title:
|
METHODS AND APPARATUS FOR INITIATING AND RESYSNCHRONIZING MULTI-CYCLE SIMD INSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/11/2004
|
Application #:
|
09598566
|
Filing Dt:
|
06/21/2000
|
|
Title:
|
SPECIFYING DIFFERENT TYPE GENERALIZED EVENT AND ACTION PAIR IN A PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
11/30/2004
|
Application #:
|
09598567
|
Filing Dt:
|
06/21/2000
|
|
Title:
|
METHODS AND APPARATUS FOR IMPROVED EFFICIENCY IN PIPELINE SIMULATION AND EMULATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/08/2004
|
Application #:
|
09599980
|
Filing Dt:
|
06/22/2000
|
|
Title:
|
CONSTRUCTING DATABASE REPRESENTING MANIFOLD ARRAY ARCHITECTURE INSTRUCTION SET FOR USE IN SUPPORT TOOL CODE CREATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/02/2002
|
Application #:
|
09649647
|
Filing Dt:
|
08/29/2000
|
|
Title:
|
Methods and apparatus for manarray PE-PE Switch control
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/03/2002
|
Application #:
|
09677732
|
Filing Dt:
|
10/02/2000
|
|
Title:
|
METHODS AND APPARATUS FOR EFFICIENT SYNCHRONOUS MIMD OPERATIONS WITH IVLIW PE-TO-PE COMMUNICATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/22/2002
|
Application #:
|
09707209
|
Filing Dt:
|
11/06/2000
|
|
Title:
|
METHODS AND APPARATUS FOR MANIFOLD ARRAY PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/22/2004
|
Application #:
|
09711218
|
Filing Dt:
|
11/09/2000
|
|
Title:
|
METHODS AND APPARATUS FOR EFFICIENT COSINE TRANSFORM IMPLEMENTATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
10/15/2002
|
Application #:
|
09717992
|
Filing Dt:
|
11/21/2000
|
|
Title:
|
METHODS AND APPARATUS FOR DYNAMIC VERY LONG INSTRUCTION WORD SUB-INSTRUCTION SELECTION FOR EXECUTION TIME PARALLELISM IN AN INDIRECT VERY LONG INSTRUCTION WORD PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/09/2004
|
Application #:
|
09747056
|
Filing Dt:
|
12/22/2000
|
|
Publication #:
|
|
Pub Dt:
|
01/03/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR LOADING A VERY LONG INSTRUCTION WORD MEMORY
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/12/2003
|
Application #:
|
09783156
|
Filing Dt:
|
02/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2001
| | | | |
|
Title:
|
MERGED CONTROL / PROCESS ELEMENT PROCESSOR FOR EXECUTING VLIW SIMPLEX INSTRUCTIONS WITH SISD CONTROL / SIMD PROCESS MODE BIT
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/11/2005
|
Application #:
|
09791256
|
Filing Dt:
|
02/23/2001
|
|
Publication #:
|
|
Pub Dt:
|
12/06/2001
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR SCALABLE ARRAY PROCESSOR INTERRUPT DETECTION AND RESPONSE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
12/21/2004
|
Application #:
|
09791940
|
Filing Dt:
|
02/23/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/03/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR PROVIDING BIT-REVERSAL AND MULTICAST FUNCTIONS UTILIZING DMA CONTROLLER
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
03/08/2005
|
Application #:
|
09792819
|
Filing Dt:
|
02/23/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/18/2001
| | | | |
|
Title:
|
Control processor dynamically loading shadow instruction register associated with memory entry of coprocessor in flexible coupling mode
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/06/2002
|
Application #:
|
09796037
|
Filing Dt:
|
02/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/02/2001
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR DYNAMIC INSTRUCTION CONTROLLED RECONFIGURABLE REGISTER FILE WITH EXTENDED PRECISION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
08/10/2004
|
Application #:
|
09796040
|
Filing Dt:
|
02/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
03/27/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS TO DYNAMICALLY RECONFIGURE THE INSTRUCTION PIPELINE OF AN INDIRECT VERY LONG INSTRUCTION WORD SCALABLE PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/18/2005
|
Application #:
|
09853989
|
Filing Dt:
|
05/11/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/10/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR POWER CONTROL IN A SCALABLE ARRAY OF PROCESSOR ELEMENTS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/17/2002
|
Application #:
|
09854789
|
Filing Dt:
|
05/14/2001
|
|
Publication #:
|
|
Pub Dt:
|
10/04/2001
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR PROVIDING DIRECT MEMORY ACCESS CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
09886855
|
Filing Dt:
|
06/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
02/14/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR INDIRECT VLIW MEMORY ALLOCATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/24/2002
|
Application #:
|
09896687
|
Filing Dt:
|
06/29/2001
|
|
Publication #:
|
|
Pub Dt:
|
01/24/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR PROVIDING DATA TRANSFER CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/29/2003
|
Application #:
|
09969077
|
Filing Dt:
|
09/28/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/13/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR SCALABLE INSTRUCTION SET ARCHITECTURE WITH DYNAMIC COMPACT INSTRUCTIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/04/2006
|
Application #:
|
10004010
|
Filing Dt:
|
11/01/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/14/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR EFFICIENT COMPLEX LONG MULTIPLICATION AND COVARIANCE MATRIX IMPLEMENTATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/23/2003
|
Application #:
|
10004578
|
Filing Dt:
|
12/04/2001
|
|
Publication #:
|
|
Pub Dt:
|
08/08/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR PROVIDING IMPROVED PHYSICAL DESIGNS AND ROUTING WITH REDUCED CAPACITIVE POWER DISSIPATION
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/21/2006
|
Application #:
|
10013908
|
Filing Dt:
|
10/19/2001
|
|
Publication #:
|
|
Pub Dt:
|
11/07/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR EFFICIENT VOCODER IMPLEMENTATIONS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
05/10/2005
|
Application #:
|
10036789
|
Filing Dt:
|
12/21/2001
|
|
Publication #:
|
|
Pub Dt:
|
06/06/2002
| | | | |
|
Title:
|
MANIFOLD ARRAY PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/17/2003
|
Application #:
|
10073782
|
Filing Dt:
|
02/11/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/20/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR INSTRUCTION ADDRESSING IN INDIRECT VLIW PROCESSORS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
09/21/2004
|
Application #:
|
10114646
|
Filing Dt:
|
04/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
10/03/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR MANARRAY PE-PE SWITCH CONTROL
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/06/2004
|
Application #:
|
10114652
|
Filing Dt:
|
04/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
11/28/2002
| | | | |
|
Title:
|
METHODS AND APPARATUS TO SUPPORT CONDITIONAL EXECUTION IN A VLIW-BASED ARRAY PROCESSOR WITH SUBWORD EXECUTION
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10116221
|
Filing Dt:
|
04/04/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/22/2004
| | | | |
|
Title:
|
Methods and apparatus for generating functional test programs by traversing a finite state model of an instruction set architecture
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/11/2006
|
Application #:
|
10119660
|
Filing Dt:
|
04/10/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/22/2004
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR AUTOMATED GENERATION OF ABBREVIATED INSTRUCTION SET AND CONFIGURABLE PROCESSOR ARCHITECTURE
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
06/28/2005
|
Application #:
|
10131941
|
Filing Dt:
|
04/25/2002
|
|
Publication #:
|
|
Pub Dt:
|
03/06/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR PIPELINED BUS
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
01/31/2006
|
Application #:
|
10136651
|
Filing Dt:
|
05/01/2002
|
|
Publication #:
|
|
Pub Dt:
|
01/30/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR REMOVING COMPRESSION ARTIFACTS IN VIDEO SEQUENCES
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/01/2005
|
Application #:
|
10254012
|
Filing Dt:
|
09/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR DYNAMIC VERY LONG INSTRUCTION WORD SUB-INSTRUCTION SELECTION FOR EXECUTION TIME PARALLELISM IN AN INDIRECT VERY LONG INSTRUCTION WORD PROCESSOR
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
07/27/2004
|
Application #:
|
10254049
|
Filing Dt:
|
09/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
05/08/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR MANIFOLD ARRAY PROCESSING
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
04/13/2004
|
Application #:
|
10254105
|
Filing Dt:
|
09/24/2002
|
|
Publication #:
|
|
Pub Dt:
|
04/24/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR PROVIDING DATA TRANSFER CONTROL
|
|
|
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
10282919
|
Filing Dt:
|
10/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
06/05/2003
| | | | |
|
Title:
|
Methods and apparatus for a bit rake instruction
|
|
|
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2007
|
Application #:
|
10282925
|
Filing Dt:
|
10/29/2002
|
|
Publication #:
|
|
Pub Dt:
|
08/28/2003
| | | | |
|
Title:
|
METHODS AND APPARATUS FOR MULTIPLE STAGE VIDEO DECODING
|
|
