Patent Assignment Details
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| Reel/Frame: | 024861/0944 | |
| Pages: | 6 |
| | Recorded: | 08/19/2010 | | |
| Attorney Dkt #: | 1152604.00223 |
| Conveyance: | CORRECTIVE ASSIGNMENT TO CORRECT THE NAME OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 019557 FRAME 0784. ASSIGNOR(S) HEREBY CONFIRMS THE RECORDED ASSIGNMENT AND AGREEMENT CORRECTLY LISTS THE ASSIGNEE AS "TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.". |
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Total properties:
1
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Patent #:
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Issue Dt:
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09/21/2010
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Application #:
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11777761
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Filing Dt:
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07/13/2007
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Publication #:
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Pub Dt:
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01/15/2009
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Title:
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METHOD FOR REDUCING TIMING LIBRARIES FOR INTRA-DIE MODEL IN STATISTICAL STATIC TIMING ANALYSIS
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Assignee
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| NO. 8, LI-HSIN ROAD 6, SCIENCE-BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 |
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Correspondence name and address
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JONG HO LEE, K&L GATES LLP
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FOUR EMBARCADERO CENTER, SUITE 1200
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SAN FRANCISCO, CA 94111
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