Patent Assignment Details
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| Reel/Frame: | 017611/0951 | |
| Pages: | 5 |
| | Recorded: | 02/28/2006 | | |
| Attorney Dkt #: | ATM-436 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
1
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Patent #:
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Issue Dt:
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10/14/2008
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Application #:
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11304425
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Filing Dt:
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12/15/2005
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Publication #:
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Pub Dt:
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07/19/2007
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Title:
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DUAL CPU ON-CHIP-DEBUG LOW-GATE-COUNT ARCHITECTURE WITH REAL-TIME-DATA TRACING
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Assignee
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| 2325 ORCHARD PARKWAY |
| SAN JOSE, CALIFORNIA 95131 |
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Correspondence name and address
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LAW OFFICES OF SCHNECK & SCHNECK
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P.O. BOX 2-E
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SAN JOSE, CA 95109-0005
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