Patent Assignment Details
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
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| Reel/Frame: | 056482/0968 | |
| Pages: | 10 |
| | Recorded: | 06/09/2021 | | |
| Attorney Dkt #: | 4262/0001 |
| Conveyance: | ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). |
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Total properties:
4
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Patent #:
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Issue Dt:
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01/30/2018
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Application #:
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14562110
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Filing Dt:
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12/05/2014
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Title:
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Storage Architecture for Storage Class Memories
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Patent #:
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Issue Dt:
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11/27/2018
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Application #:
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15159654
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Filing Dt:
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05/19/2016
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Title:
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Endurance Aware Raid Scheme for Flash Based SSDS with FPGA Optimized Implementation
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Patent #:
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Issue Dt:
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11/20/2018
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Application #:
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15159703
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Filing Dt:
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05/19/2016
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Title:
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INPUT OUTPUT SCHEDULING FOR SOLID STATE MEDIA
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Patent #:
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Issue Dt:
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06/25/2019
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Application #:
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15421122
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Filing Dt:
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01/31/2017
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Title:
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HIGH PERFORMANCE AND LOW-LATENCY REPLICATION USING STORAGE MIRRORING
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Assignee
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| 231 MARKET PL STE 373 |
| SAN RAMON, CALIFORNIA 94583 |
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Correspondence name and address
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ROBERT M. ASHER
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SUNSTEIN LLP, 100 HIGH STREET
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BOSTON, MA 02110
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