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Reel/Frame:054721/0977   Pages: 16
Recorded: 12/22/2020
Attorney Dkt #:GOOGLE 3.3-3289
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 20
1
Patent #:
NONE
Issue Dt:
10/06/2015
Application #:
13976074
Filing Dt:
06/26/2013
Publication #:
US20130285155
Pub Dt:
10/31/2013
PCT #:
US2011066132
Title:
III-V LAYERS FOR N-TYPE AND P-TYPE MOS SOURCE-DRAIN CONTACTS
2
Patent #:
NONE
Issue Dt:
06/16/2015
Application #:
13976075
Filing Dt:
06/26/2013
Publication #:
US20130277752
Pub Dt:
10/24/2013
PCT #:
US2011066134
Title:
SELF-ALIGNED CONTACT METALLIZATION FOR REDUCED CONTACT RESISTANCE
3
Patent #:
NONE
Issue Dt:
03/31/2015
Application #:
13994660
Filing Dt:
06/14/2013
Publication #:
US20130264707
Pub Dt:
10/10/2013
PCT #:
US2011054428
Title:
Structure having a planar bonding surface
4
Patent #:
NONE
Issue Dt:
11/19/2019
Application #:
13995914
Filing Dt:
06/19/2013
Publication #:
US20140209855
Pub Dt:
07/31/2014
PCT #:
US2011067226
Title:
NANOWIRE STRUCTURES HAVING WRAP-AROUND CONTACTS
5
Patent #:
NONE
Issue Dt:
07/21/2015
Application #:
13995930
Filing Dt:
06/19/2013
Publication #:
US20140042386
Pub Dt:
02/13/2014
PCT #:
US2011067232
Title:
NANOWIRE STRUCTURES HAVING NON-DISCRETE SOURCE AND DRAIN REGIONS
6
Patent #:
NONE
Issue Dt:
09/24/2019
Application #:
13996505
Filing Dt:
06/20/2013
Publication #:
US20130313513
Pub Dt:
11/28/2013
PCT #:
US2011067223
Title:
SEMICONDUCTOR DEVICES HAVING MODULATED NANOWIRE COUNTS
7
Patent #:
NONE
Issue Dt:
01/31/2017
Application #:
13996506
Filing Dt:
06/20/2013
Publication #:
US20130320294
Pub Dt:
12/05/2013
PCT #:
US2011067242
Title:
COMMON-SUBSTRATE SEMICONDUCTOR DEVICES HAVING NANOWIRES OR SEMICONDUCTOR BODIES WITH DIFFERING MATERIAL ORIENTATION OR COMPOSITION
8
Patent #:
NONE
Issue Dt:
04/18/2017
Application #:
13997152
Filing Dt:
06/21/2013
Publication #:
US20130292840
Pub Dt:
11/07/2013
PCT #:
US2011063190
Title:
STACKED MEMORY ALLOWING VARIANCE IN DEVICE INTERCONNECTS
9
Patent #:
NONE
Issue Dt:
05/16/2017
Application #:
13997166
Filing Dt:
06/21/2013
Publication #:
US20130320417
Pub Dt:
12/05/2013
PCT #:
US2011067424
Title:
METHODS TO ENHANCE DOPING CONCENTRATION IN NEAR-SURFACE LAYERS OF SEMICONDUCTORS AND METHODS OF MAKING SAME
10
Patent #:
9966440
Issue Dt:
05/08/2018
Application #:
14517365
Filing Dt:
10/17/2014
Publication #:
US20150054031
Pub Dt:
02/26/2015
Title:
TIN DOPED III-V MATERIAL CONTACTS
11
Patent #:
NONE
Issue Dt:
07/18/2017
Application #:
14778036
Filing Dt:
09/17/2015
Publication #:
US20160358897
Pub Dt:
12/08/2016
PCT #:
US2014069361
Title:
THREE DIMENSIONAL STRUCTURES WITHIN MOLD COMPOUND
12
Patent #:
NONE
Issue Dt:
Application #:
14913173
Filing Dt:
02/19/2016
Publication #:
US20160204207
Pub Dt:
07/14/2016
Title:
Composite High-K Metal Gate Stack for Enhancement Mode GaN Semiconductor Devices
13
Patent #:
NONE
Issue Dt:
Application #:
14913173
Filing Dt:
02/19/2016
Publication #:
US20160204207
Pub Dt:
07/14/2016
PCT #:
US2013062314
Title:
Composite High-K Metal Gate Stack for Enhancement Mode GaN Semiconductor Devices
14
Patent #:
9508796
Issue Dt:
11/29/2016
Application #:
14916093
Filing Dt:
03/02/2016
Publication #:
US20160211322
Pub Dt:
07/21/2016
Title:
INTERNAL SPACERS FOR NANOWIRE TRANSISTORS AND METHOD OF FABRICATION THEREOF
15
Patent #:
NONE
Issue Dt:
11/29/2016
Application #:
14916093
Filing Dt:
03/02/2016
Publication #:
US20160211322
Pub Dt:
07/21/2016
PCT #:
US2013063186
Title:
INTERNAL SPACERS FOR NANOWIRE TRANSISTORS AND METHOD OF FABRICATION THEREOF
16
Patent #:
10586868
Issue Dt:
03/10/2020
Application #:
15024714
Filing Dt:
03/24/2016
Publication #:
US20160276484
Pub Dt:
09/22/2016
Title:
NON-PLANAR SEMICONDUCTOR DEVICE HAVING HYBRID GEOMETRY-BASED ACTIVE REGION
17
Patent #:
NONE
Issue Dt:
03/10/2020
Application #:
15024714
Filing Dt:
03/24/2016
Publication #:
US20160276484
Pub Dt:
09/22/2016
PCT #:
US2013076651
Title:
NON-PLANAR SEMICONDUCTOR DEVICE HAVING HYBRID GEOMETRY-BASED ACTIVE REGION
18
Patent #:
9935205
Issue Dt:
04/03/2018
Application #:
15335269
Filing Dt:
10/26/2016
Publication #:
US20170047452
Pub Dt:
02/16/2017
Title:
INTERNAL SPACERS FOR NANOWIRE TRANSISTORS AND METHOD OF FABRICATION THEREOF
19
Patent #:
10593804
Issue Dt:
03/17/2020
Application #:
16108610
Filing Dt:
08/22/2018
Publication #:
US20180358467
Pub Dt:
12/13/2018
Title:
NON-PLANAR SEMICONDUCTOR DEVICE HAVING HYBRID GEOMETRY-BASED ACTIVE REGION
20
Patent #:
11139400
Issue Dt:
10/05/2021
Application #:
16785975
Filing Dt:
02/10/2020
Publication #:
US20200185526
Pub Dt:
06/11/2020
Title:
NON-PLANAR SEMICONDUCTOR DEVICE HAVING HYBRID GEOMETRY-BASED ACTIVE REGION
Assignor
1
INTEL CORPORATION
Exec Dt:
11/13/2020
Assignee
1
GOOGLE LLC
1600 AMPHITHEATRE PARKWAY
MOUNTAIN VIEW, CALIFORNIA 94043
Correspondence name and address
LERNER, DAVID, LITTENBERG, KRUMHOLZ & MENTLIK, LLP
20 COMMERCE DR.
CRANFORD, NJ 07016

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