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Reel/Frame:051933/0984   Pages: 4
Recorded: 02/26/2020
Attorney Dkt #:16313-228
Conveyance: ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Total properties: 1
1
Patent #:
Issue Dt:
02/09/2021
Application #:
16801414
Filing Dt:
02/26/2020
Publication #:
Pub Dt:
08/27/2020
Title:
IC layout design method
Assignors
1
Exec Dt:
10/28/2019
2
Exec Dt:
10/28/2019
3
Exec Dt:
10/28/2019
4
Exec Dt:
10/28/2019
5
Exec Dt:
10/28/2019
Assignee
1
NO. 2, INNOVATION ROAD II, HSINCHU SCIENCE PARK
HSINCHU, TAIWAN 300
Correspondence name and address
WPAT, PC INTELLECTUAL PROPERTY ATTORNEYS
8230 BOONE BLVD, SUITE 405
VIENNA, VA 22182

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