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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
10078550
Issue Dt:
09/18/2018
Application #:
14842356
Filing Dt:
09/01/2015
Publication #:
20160085627
Pub Dt:
03/24/2016
Inventors:
Takao MARUKAME, Yoshifumi NISHI, Yusuke HIGASHI, Kazuya MATSUZAWA, Yuichiro MITANI et al
Title:
Memory System, Error Correction Device, and Error Correction Method
Assignment: 1
Reel/Frame:
036471/0243Recorded: 09/01/2015Pages: 8
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
MARUKAME, TAKAO
Exec Dt:
08/10/2015
NISHI, YOSHIFUMI
Exec Dt:
08/20/2015
HIGASHI, YUSUKE
Exec Dt:
08/20/2015
CHEN, JIEZHI
Exec Dt:
08/20/2015
MATSUZAWA, KAZUYA
Exec Dt:
08/17/2015
MITANI, YUICHIRO
Exec Dt:
08/20/2015
Assignee:
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME
MINATO-KU, TOKYO, JAPAN 105-8001
Correspondent:
E. CHAPMAN - FINNEGAN, HENDERSON
901 NEW YORK AVENUE, NW
WASHINGTON, DC 20001-4413

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