Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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10/09/2018
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Application #:
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15376403
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Filing Dt:
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12/12/2016
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Inventors:
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Navneet Kaushik, Puneet Arora, Steven Lee Gregor, Norman Card
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Title:
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MEMORY BUILT-IN SELF-TEST LOGIC IN AN INTEGRATED CIRCUIT DESIGN
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2655 SEELY AVENUE |
| BUILDING 5 |
| SAN JOSE, CALIFORNIA 95134 |
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| SCHWEGMAN LUNDBERG & WOESSNER, P.A. |
| PO BOX 2938 |
| MINNEAPOLIS, MN 55402-0938 |
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