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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
11/20/2018
Application #:
15729791
Filing Dt:
10/11/2017
Inventor:
Gary A. Ray
Title:
Dynamic Low-Latency Processing Circuits Using Interleaving
Assignment: 1
Reel/Frame:
043834/0752Recorded: 10/11/2017Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
10/11/2017
Assignee:
100 NORTH RIVERSIDE PLAZA
CHICAGO, ILLINOIS 60606-1596
Correspondent:
OSTRAGER CHONG FLAHERTY & BROITMAN, P.C.
570 LEXINGTON AVENUE
FLOOR 19
NEW YORK, NY 10022

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