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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
04/09/2019
Application #:
15863983
Filing Dt:
01/08/2018
Publication #:
Pub Dt:
07/12/2018
Inventors:
Chang-Cheng Huang, Shen-Iuan Liu, Ju-Lin Huang, Tzu-Chien Tzeng, Keko-Chun Liang et al
Title:
CLOCK AND DATA RECOVERY CIRCUIT WITH JITTER TOLERANCE ENHANCEMENT
Assignment: 1
Reel/Frame:
044553/0707Recorded: 01/08/2018Pages: 7
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
01/05/2018
Exec Dt:
01/05/2018
Exec Dt:
12/19/2017
Exec Dt:
12/19/2017
Exec Dt:
12/19/2017
Exec Dt:
12/19/2017
Exec Dt:
12/19/2017
Assignee:
2F, NO. 13, INNOVATION ROAD I, SCIENCE-BASED INDUSTRIAL PARK,
HSINCHU, TAIWAN
Correspondent:
JCIPRNET
P.O. BOX 600 TAIPEI GUTING
TAIPEI CITY, 10099 TAIWAN

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