Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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05/14/2019
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Application #:
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15634016
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Filing Dt:
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06/27/2017
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Inventors:
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Chaithanya Dudha, Shangzhi Sun, Ashish Sirasao, Nithin Kumar Guggilla
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Title:
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CIRCUIT DESIGN TRANSFORMATION FOR AUTOMATIC LATENCY REDUCTION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2100 LOGIC DRIVE |
| SAN JOSE, CALIFORNIA 95124 |
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| XILINX, INC. |
| 2100 LOGIC DRIVE |
| ATTN: LEGAL DEPT. |
| SAN JOSE, CA 95124 |
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