Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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10/15/2019
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Application #:
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15568858
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Filing Dt:
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10/24/2017
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Publication #:
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Pub Dt:
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04/12/2018
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PCT #:
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US2016033807
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Inventors:
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Niranjan Kulkarni, Sarma Vrudhula
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Title:
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HOLD VIOLATION FREE SCAN CHAIN AND SCANNING MECHANISM FOR TESTING OF SYNCHRONOUS DIGITAL VLSI CIRCUITS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1475 NORTH SCOTTSDALE ROAD |
| SKYSONG - SUITE 200 |
| SCOTTSDALE, ARIZONA 85257 |
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| WITHROW + TERRANOVA, P.L.L.C. |
| 106 PINEDALE SPRINGS WAY |
| CARY, NC 27511 |
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