Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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12/31/2019
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Application #:
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15288912
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Filing Dt:
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10/07/2016
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Publication #:
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Pub Dt:
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07/27/2017
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Inventor:
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Sanjay Pillay
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Title:
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LOW POWER VLSI DESIGNS USING CIRCUIT FAILURE IN SEQUENTIAL CELLS AS LOW VOLTAGE CHECK FOR LIMIT OF OPERATION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1613 S. CAPITAL OF TEXAS HWY |
| SUITE 222 |
| AUSTIN, TEXAS 78746 |
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| JOHN A. FORTKORT |
| 9442 N. CAPITAL OF TEXAS HWY |
| ARBORETUM PLAZA 1, SUITE 500 |
| AUSTIN, TX 78730 |
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Assignment:
2
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NUNC PRO TUNC ASSIGNMENT (SEE DOCUMENT FOR DETAILS).
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| 8005 SW BOECKMAN ROAD |
| WILSONVILLE, OREGON 97070 |
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| SIEMENS CORPORATION |
| INTELLECTUAL PROPERTY DEPT |
| 3501 QUADRANGLE BLVD STE 230 |
| ORLANDO, FL 32817 |
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Assignment:
3
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MERGER AND CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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Newly Merged Entity's New Name:
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| 5800 GRANITE PARKWAY, SUITE 600 |
| PLANO, TEXAS 75024 |
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| SIEMENS CORPORATION IP DEPT - MAIL CODE INT-244 |
| 3850 QUADRANGLE BOULEVARD |
| ORLANDO, FL 32817 |
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