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Patent Assignment Abstract of Title
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Total Assignments: 3
Patent #:
Issue Dt:
03/03/2020
Application #:
15944303
Filing Dt:
04/03/2018
Inventors:
Juan J. Noguera Serra, Baris Ozgul, Goran HK Bilski, Jan Langer
Title:
STALL LOGIC FOR A DATA PROCESSING ENGINE IN AN INTEGRATED CIRCUIT
Assignment: 1
Reel/Frame:
045438/0987Recorded: 04/04/2018Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
03/27/2018
Exec Dt:
03/29/2018
Exec Dt:
04/03/2018
Assignee:
2100 LOGIC DRIVE
SAN JOSE, CALIFORNIA 95124
Correspondent:
XILINX, INC.
2100 LOGIC DRIVE
ATTN: LEGAL DEPT.
SAN JOSE, CA 95124
Assignment: 2
Reel/Frame:
045438/0941Recorded: 04/04/2018Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
04/03/2018
Assignee:
WILLY-BRANDT-ALLEE 4
MUNICH, GERMANY 81829
Correspondent:
XILINX, INC.
2100 LOGIC DRIVE
ATTN: LEGAL DEPT.
SAN JOSE, CA 95124
Assignment: 3
Reel/Frame:
048719/0864Recorded: 03/27/2019Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
03/27/2019
Assignee:
2100 LOGIC DRIVE
LEGAL DEPT.
SAN JOSE, CALIFORNIA 95124
Correspondent:
XILINX, INC.
2100 LOGIC DRIVE
LEGAL DEPT.
SAN JOSE, CA 95124

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