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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
10664193
Issue Dt:
05/26/2020
Application #:
16084916
Filing Dt:
09/13/2018
Publication #:
20190087122
Pub Dt:
03/21/2019
Inventors:
Takahiko TAKEDA, Sho SAWADA, Kenta SHINOZUKA, Isamu KUROKAWA
Title:
STORAGE SYSTEM FOR IMPROVED EFFICIENCY OF PARITY GENERATION AND MINIMIZED PROCESSOR LOAD
Assignment: 1
Reel/Frame:
046871/0979Recorded: 09/13/2018Pages: 6
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
SHINOZUKA, KENTA
Exec Dt:
08/06/2018
TAKEDA, TAKAHIKO
Exec Dt:
08/01/2018
KUROKAWA, ISAMU
Exec Dt:
08/02/2018
SAWADA, SHO
Exec Dt:
08/06/2018
Assignee:
HITACHI, LTD,
6-6, MARUNOUCHI 1-CHOME
CHIYODA-KU, TOKYO, JAPAN
Correspondent:
PROCOPIO, CORY, HARGREAVES & SAVITCH LLP
525 B STREET
SUITE 2200
SAN DIEGO, CA 92101
Assignment: 2
Reel/Frame:
047585/0945Recorded: 09/21/2018Pages: 8
Conveyance:
CORRECTIVE ASSIGNMENT TO CORRECT THE SPEELLING OF ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 046871 FRAME: 0979. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Assignors:
SHINOZUKA, KENTA
Exec Dt:
08/06/2018
TAKEDA, TAKAHIKO
Exec Dt:
08/01/2016
KUROKAWA, ISAMU
Exec Dt:
08/02/2018
SAWADA, SHO
Exec Dt:
08/06/2018
Assignee:
HITACHI, LTD.
6-6, MARUNOUCHI 1-CHOME
CHIYODA-KU, TOKYO, JAPAN
Correspondent:
PROCOPIO, CORY, HARGREAVES & SAVITCH LLP
525 B STREET, SUITE 2200
SAN DIEGO, CA 92101

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