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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
07/28/2020
Application #:
15981270
Filing Dt:
05/16/2018
Publication #:
Pub Dt:
09/20/2018
Inventors:
G. Glenn HENRY, Terry PARKS, Douglas R. Reed
Title:
PROCESSOR WITH SELECTIVE DATA STORAGE (OF ACCELERATOR) OPERABLE AS EITHER VICTIM CACHE DATA STORAGE OR ACCELERATOR MEMORY AND HAVING VICTIM CACHE TAGS IN LOWER LEVEL CACHE WHEREIN EVICTED CACHE LINE IS STORED IN SAID DATA STORAGE WHEN SAID DATA STORAGE IS IN A FIRST MODE AND SAID CACHE LINE IS STORED IN SYSTEM MEMORY RATHER THEN SAID DATA STORE WHEN SAID DATA STORAGE IS IN A SECOND MODE
Assignment: 1
Reel/Frame:
045821/0149Recorded: 05/16/2018Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
04/04/2018
Exec Dt:
04/04/2018
Exec Dt:
04/04/2018
Assignee:
ROOM 301, NO.2537, JINKE ROAD, ZHANGJIANG HI-TECH PARK
SHANGHAI, CHINA 201203
Correspondent:
MCCLURE, QUALEY & RODACK, LLP
3100 INTERSTATE NORTH CIRCLE
SUITE 150
ATLANTA, GA 30339

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