Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/01/2020
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Application #:
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16678472
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Filing Dt:
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11/08/2019
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Publication #:
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Pub Dt:
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03/05/2020
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Inventors:
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Yen-Ting Chen, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
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Title:
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INTEGRATED CIRCUIT WITH DOPED LOW-K SIDEWALL SPACERS FOR GATE STACKS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 8, LI-HSIN RD. 6 |
| HSINCHU SCIENCE PARK |
| HSINCHU, TAIWAN 300-78 |
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| HAYNES AND BOONE, LLP IP SECTION |
| 2323 VICTORY AVENUE |
| SUITE 700 |
| DALLAS, TX 75219 |
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