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Patent Assignment Abstract of Title

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Total Assignments: 2

Patent #:	10984861	Issue Dt:	04/20/2021	Application #:	16032012	Filing Dt:	07/10/2018
Inventors:	Ishai Naveh, Venkatesh P. Gopinath, John Dinh, Mark T. Ramsbey
Title:	REFERENCE CIRCUITS AND METHODS FOR RESISTIVE MEMORIES

Assignment: 1

Reel/Frame:

049700/0162

Recorded: 07/09/2019

Pages: 3

Conveyance:

ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Assignors:

NAVEH, ISHAI

Exec Dt:

07/17/2018

GOPINATH, VENKATESH P.

Exec Dt:

07/18/2018

DINH, JOHN

Exec Dt:

07/16/2018

RAMSBEY, MARK T.

Exec Dt:

07/25/2018

Assignee:

ADESTO TECHNOLOGIES CORPORATION

3600 PETERSON WAY

SANTA CLARA, CALIFORNIA 94054

Correspondent:

SAKO IP

P.O. BOX 2008

LIVERMORE, CA 94551-2008

Assignment: 2

Reel/Frame:

063118/0352

Recorded: 03/20/2023

Pages: 11

Conveyance:

ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Assignor:

RENESAS DESIGN US INC. (FORMERLY KNOWN AS DIALOG SEMICONDUCTOR US INC. AS SUCCESSOR-IN-INTEREST TO ADESTO TECHNOLOGIES CORPORATION AND ARTEMIS ACQUISITION, LLC)

Exec Dt:

02/03/2023

Assignee:

GLOBALFOUNDRIES U.S. INC.

400 STONEBREAK ROAD EXTENSION

MALTA, NEW YORK 12020

Correspondent:

ANDREW M. CALDERON

7918 JONES BRANCH DRIVE, SUITE 500

MCLEAN, VA 22102

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