Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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08/10/2021
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Application #:
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16670146
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Filing Dt:
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10/31/2019
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Publication #:
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Pub Dt:
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05/07/2020
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Inventor:
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Jean-Francois Cote
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Title:
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Clock Gating And Scan Clock Generation For Circuit Test
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 411 LEGGET DRIVE, SUITE 502 |
| KANATA, OTTAWA, CANADA K2K 3C9 |
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| MENTOR GRAPHICS C/O SIEMENS CORPORATION |
| 3501 QUADRANGLE BLVD STE 230 |
| ORLANDO, FL 32817 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 8005 S.W. BOECKMAN RD. |
| WILSONVILLE, OREGON 97070 |
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| MENTOR GRAPHICS C/O SIEMENS CORPORATION |
| 3501 QUADRANGLE BLVD STE 230 |
| INTELLECTUAL PROPERTY |
| ORLANDO, FL 32817 |
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Assignment:
3
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MERGER AND CHANGE OF NAME (SEE DOCUMENT FOR DETAILS).
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Newly Merged Entity's New Name:
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| 5800 GRANITE PARKWAY |
| SUITE 600 |
| PLANO, TEXAS 75024 |
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| SIEMENS CORPORATION |
| 3850 QUADRANGLE BLVD |
| IP DEPT, MAIL CODE INT-244 |
| ORLANDO, FL 32817 |
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