Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
1
|
|
Patent #:
|
|
Issue Dt:
|
02/20/2024
|
Application #:
|
17907099
|
Filing Dt:
|
09/23/2022
|
|
Publication #:
|
|
Pub Dt:
|
04/06/2023
| | | | |
|
Inventors:
|
Ying LIU, Shengwen XIANG
|
|
Title:
|
SERDES MODULE CLOCK NETWORK ARCHITECTURE
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| NO.15, GAOXIN S.AVE.1ST, HIGH-TECH INDUSTRIAL PARK, |
| NANSHAN DISTRICT, |
| SHENZHEN CITY, GUANGDONG PROVINCE,, CHINA |
|
|
|
|
| KUSHAL MALHOTRA |
| 399,15TH CROSS,5TH MAIN |
| SECTOR-6, HSR LAYOUT |
| BENGALURU, 560102 INDIA |
|
|
Search Results as of:
06/01/2024 03:54 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
