Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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05/14/2024
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Application #:
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17873869
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Filing Dt:
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07/26/2022
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Publication #:
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Pub Dt:
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02/01/2024
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Inventors:
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Subhasis Sasmal, Dong Pan
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Title:
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VOLTAGE TESTING CIRCUIT WITH ERROR PROTECTION SCHEME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 8000 S. FEDERAL WAY |
| BOISE, IDAHO 83707-0006 |
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| ROBERT A. MANWARE |
| PO BOX 692289 |
| HOUSTON, TX 77269-2289 |
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