Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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02/02/1988
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Application #:
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06774683
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Filing Dt:
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09/11/1985
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Inventor:
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YASUO AKATSUKA
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Title:
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CMOS INTEGRATED CIRCUIT PROTECTED FROM LATCH-UP PHENOMENON
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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| 33-1, SHIBA 5-CHOME, MINATO-KU, |
| TOKYO, JAPAN |
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| SUGHRUE, MION, ZINN, |
| MACPEAK & SEAS |
| 1776 K ST., N. W. |
| WASHINGTON, DC 20006 |
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