Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
Total Assignments:
1
|
Patent #:
|
|
Issue Dt:
|
02/09/1988
|
Application #:
|
06941214
|
Filing Dt:
|
12/12/1986
|
Inventors:
|
MICHIHIRO YAMADA, HIROSHI MIYAMOTO
|
Title:
|
CMOS DECODER CIRCUIT RESISTANT TO LATCH-UP
|
|
Assignment:
1
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST.
|
|
|
|
|
|
2-3 MARUNOUCHI 2-CHOME |
CHIYODA-KU, TOKYO, JAPAN |
|
|
|
LOWE, PRICE, LEBLANC, |
BECKER & SHUR |
427 NORTH LEE ST. |
ALEXANDRIA, VA 22314 |
|
|
Search Results as of:
04/28/2024 09:06 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|