Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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10/02/1990
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Application #:
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07269689
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Filing Dt:
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11/10/1988
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Inventor:
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TAIJI EMA
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Title:
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SEMICONDUCTOR MEMORY DEVICE HAVING A CHARGE BARRIER LAYER FOR PREVENTING SOFT ERROR
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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| NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA, 211, JAPAN |
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| STAAS & HALSEY |
| 1825 K STREET, N.W. |
| SUITE 816 |
| WASHINGTON, DC 20006 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 2-10-23 SHIN-YOKOHAMA, KOHOKU-KU |
| YOKOHAMA-SHI, JAPAN 222-0033 |
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| STAAS & HALSEY LLP |
| ATTENTION: J. RANDALL BECKERS |
| 1201 NEW YORK AVE., N.W., 7TH FLOOR |
| WASHINGTON, D.C. 20005 |
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