Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/31/1991
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Application #:
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07618841
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Filing Dt:
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11/28/1990
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Inventor:
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HIROYUKI MISAWA
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Title:
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WIRED LOGIC CIRCUIT FOR USE IN GATE ARRAY INTEGRATED CIRCUIT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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7-1, SHIBA 5-CHOME, MINATO-KU |
TOKYO, JAPAN |
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J. FRANK OSHA |
SUGHRUE, MION, ZINN ET AL |
2100 PENNSYLVANIA AVENUE, N.W. |
WASHINGTON, D.C. 20037-3202 |
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