Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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03/10/1992
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Application #:
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07625266
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Filing Dt:
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12/10/1990
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Inventors:
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KAZUHIKO HIRANO, JUNICHI SAITO, TAKAFUMI UEHARA
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Title:
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TIMING SIGNAL DELAY CIRCUIT WITH HIGH RESOLUTION OR ACCURACY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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| 19-7, KAMATA 4-CHOME, |
| A JAPANESE CORP. |
| OTA-KU, TOKYO, JAPAN |
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| GREGORY J. LAVORGNA |
| SEIDEL, GONDA, LAVORGNA & MONACO, P.C. |
| 1800 TWO PENN CENTER PLAZA |
| PHILADELPHIA, PA 19102 |
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