Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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03/23/1993
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Application #:
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07793916
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Filing Dt:
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11/18/1991
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Inventors:
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WILLIAM J. BOARDMAN, YING TSONG LOH, EDWARD D. NOWAK, CHUNG SHU WANG
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Title:
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METHOD OF MAKING EXTENDED POLYSILICON SELF-ALIGNED GATE OVERLAPPED LIGHTLY DOPED DRAIN STRUCTURE FOR SUBMICRON TRANSISTOR
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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| 1109 MCKAY DRIVE, SAN JOSE, CA 95131 |
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| VLSI TECHNOLOGY, INC., |
| LEGAL DEPT., |
| 1109 MC KAY DRIVE |
| SAN JOSE, CA 95131 |
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