Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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03/23/1993
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Application #:
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07631600
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Filing Dt:
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12/20/1990
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Inventors:
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MARK R. HARTOOG, THOMAS J. SCHAEFER, ROBERT D. SHUR
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Title:
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SYSTEM AND METHOD FOR SETTING CAPACITIVE CONSTRAINTS ON SYNTHESIZED LOGIC CIRCUITS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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1109 MCKAY DRIVE |
SAN JOSE, CALIFORNIA 95131 |
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VLSI TECHNOLOGY, INC. |
LEGAL DEPT. |
1109 MC KAY DR. |
SAN JOSE, CA 95131 |
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