Patent Assignment Abstract of Title
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For pending or abandoned applications please consult USPTO staff.
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/20/1994
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Application #:
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07875653
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Filing Dt:
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04/29/1992
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Inventors:
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YOSHITAKA TADAKI, TOSHIHIRO SEKIGUCHI, HIROYUKI UCHIYAMA, TORU KAGA, JUN MURATA et al
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING MEMORY CELLS HAVING A STRUCTURE EFFECTIVE IN SUPPRESSION OF LEAK CURRENT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 6, KANDA SURUGADAI 4-CHOME, CHIYODA-KU, TOKYO, JAPAN |
| JAPAN |
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| AOYAMA FUJI BUILDING, 6-12, KITA-AOYAMA 3-CHOME, MINATO-KU TOKYO, JAPAN |
| JAPAN |
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| GREGORY E. MONTONE |
| 1919 PENNSYLVANIA AVENUE, N.W. |
| SUITE 600 |
| WASHINGTON, DC 20006 |
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