Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/31/1995
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Application #:
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07766524
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Filing Dt:
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09/27/1991
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Inventor:
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EIJI ASANO
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Title:
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SYSTEM WITH REDUCED INSTRUCTION SET PROCESSOR ACCESSING PLURAL MEMORIES AT DIFFERENT SPEEDS USING BANK INTERLEAVING
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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| C/O OSAKA KOKUSAI BLDG., 3-13, 2-CHOME |
| AZUCHI-MACHI, CHUO-KU, OSAKA-SHI |
| OSAKA, JAPAN |
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| PLATON N. MANDROS |
| BURNS, DOANE, SWECKER & MATHIS |
| GEORGE MASON BLDG., WASH. & PRINCE STS. |
| P.O. BOX 1404 |
| ALEXANDRIA, VA 22313-1404 |
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