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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
03/28/1995
Application #:
07801793
Filing Dt:
12/02/1991
Inventors:
THOMAS J. SCHAEFER, ROBERT D. SHUR
Title:
SYSTEM AND METHOD FOR SYNTHESIZING LOGIC CIRCUITS WITH TIMING CON- CONSTRAINTS
Assignment: 1
Reel/Frame:
006060/0192Recorded: 03/16/1992Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST.
Assignors:
Exec Dt:
03/09/1992
Exec Dt:
03/10/1992
Assignee:
1109 MCKAY DRIVE
A CORPORATION OF DELAWARE
SAN JOSE, CALIFORNIA 95131
Correspondent:
PAUL L. HICKMAN
VLSI TECHNOLOGY, INC.
1109 MCKAY DRIVE
SAN JOSE, CA 95131

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