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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
05/16/1995
Application #:
07978558
Filing Dt:
11/19/1992
Inventor:
LAWRENCE B. EDWARDS
Title:
SYSTEM AND METHOD FOR COMPACTING INTEGRATED CIRCUIT LAYOUTS
Assignment: 1
Reel/Frame:
006381/0739Recorded: 11/19/1992Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST.
Assignor:
Exec Dt:
11/19/1992
Assignee:
1109 MCKAY DRIVE, MS/45
SAN JOSE, CALIFORNIA 95131
Correspondent:
WILLIAM G. BECKER
VLSI TECHNOLOGY, INC.
1109 MCKAY DRIVE, MS/45
SAN JOSE, CA. 95131

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