Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/11/1995
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Application #:
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08005567
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Filing Dt:
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01/19/1993
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Inventor:
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TATSURO INOUE
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Title:
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METHOD FOR FABRICATING NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING TWO-LAYERED GATE STRUCTURE TRANSISTOR
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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| 7-1, SHIBA 5-CHOME |
| MINATO-KU, TOKYO, JAPAN |
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| PLATON N. MANDROS |
| BURNS, DOANE, SWECKER & MATHIS |
| THE GEORGE MASON BLDG., P.O. BOX 1404 |
| WASHINGTON & PRINCE STREETS |
| ALEXANDRIA, VA 22313-1404 |
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