Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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10/24/1995
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Application #:
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08123883
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Filing Dt:
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09/20/1993
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Inventors:
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SRIMAT T. CHAKRADHAR, SUMAN KANJILAL, VISHWANI AGRAWAL
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Title:
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VLSI CIRCUITS DESIGNED FOR TESTABILITY AND METHODS FOR PRODUCING THEM
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| OCLTT, ASB ANNEX II BEVIER ROAD |
| PO BOX 1179 |
| PISCATAWAY, NEW JERSEY 08855 |
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| JOHN F. RITTER |
| RUTGERS, THE STATE UNIVERSITY OF NJ |
| OCLTT, ASB ANNEX II |
| BEVIER ROAD, PO BOX 1179 |
| PISCATAWAY, NJ 08854 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 32 AVENUE OF THE AMERICAS |
| NEW YORK, NEW YORK 10013-2412 |
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| ARTHUR J. TORSIGLIERI |
| NEC RESEARCH INSTITUTE, INC. |
| 4 INDEPENDENCE WAY |
| PRINCETON, NJ 08540 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-1, SHIBA, 5-CHOME, MINATO-KU |
| TOKYO, JAPAN |
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| NEC RESEARCH INSTITUTE, INC. |
| PHILIP J. FEIG |
| 4 INDEPENDENCE WAY |
| PRINCETON, NJ 08540 |
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