Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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11/14/1995
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Application #:
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08329204
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Filing Dt:
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10/26/1994
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Inventor:
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HIROSHI TANIGAWA
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Title:
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AN INTEGRATOR INCLUDING AN OFFSET ELIMINATING CIRCUIT AND CAPABLE OF OPERATING WITH LOW VOLTAGE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1-17, 2-CHOME HIGASHI YUKIGAYA OHTA-KU, TOKYO, JAPAN |
TOKYO,, JAPAN |
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RICHARD B. KLAR |
DVORAK AND TRAUB |
20 EXCHANGE PLACE, 37TH FLOOR |
NEW YORK, NEW YORK 10005 |
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