Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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04/02/1996
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Application #:
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07986031
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Filing Dt:
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12/04/1992
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Inventors:
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TOSHINORI MAEDA, YUKIHARU URAOKA
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Title:
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DEVICE FOR AND METHOD OF EVALUATING SEMICONDUCTOR INTEGRATED CIRCUIT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST.
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| 1006 OAZA KADOMA, KADOMA-SHI |
| OSAKA 571, JAPAN |
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| WILLIAN BRINKS OLDS HOFER GILSON & LIONE |
| KENNETH L. CAGE, ESQ. |
| 2000 K STREET, N.W. |
| SUITE 200 |
| WASHINGTON, D.C. 20006 |
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Assignment:
2
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RO CORRECT THE NAME OF ASSIGNOR IN AN ASSIGNMENT PREVIOUSLY RECORDED. ( SEE RECORD FOR DETAILS)
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| 1006 OAZA KADOMA, KADOMA-SHI |
| OSAKA 571, JAPAN |
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| KENNETH L. CAGE |
| WILLIAN BRINKS OLDS HOFER |
| GILSON & LIONE |
| 2000 K STREET N.W. SUITE 200 |
| WASHINGTON, D.C. 20006 |
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